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Cadence SiP Layout 

Logical and physical co-design using 3D techniques

Cadence SiP Layout provides a complete constraint- and rules-driven co-design and substrate layout environment for SiP implementation, including full 3D creation and editing capabilities.

Cadence Co-Design Datasheet »

  • Encounter and Virtuoso integration features integrated into a single product: Chip Integration Option for Cadence SiP Layout XL (available in January 2010)