Virtual interconnect exploration and simulationAllegro Package SI offers powerful simulation for source synchronous and serial interfaces. The embedded 3D field solver resolves electrical issues early and performs extensive post-layout debugging.
 Allegro Package SI Datasheet » |
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APSI L and SiP SI XL
- SigXp User Interface Overhaul
- Next generation Signal Explorer (SigXp) brings pre-route exploration to every engineer’s desktop
- PCB layer stackup aware for early tradeoff studies
- Context sensitive right-mouse-button
- Never more than a few mouse clicks away from a waveform
- Improved support for IO Modeling Standards
- IBIS libraries and models remain in native format
- Assign, view, or edit models in IBIS format
- Current DML flow remains as an alternative
- New wizard imports HSpice models
- Manual model wrapping no longer required
- Models can be managed in definable search paths
- Full Wave field solver now supports surface roughness
- Three modeling techniques to choose from: Hammerstad, Modified Hammerstad, or Exponential model
SiP SI XL
- Signal Quality Screening of routed signals streamlines Channel Analysis flow
- Signal quality screening reduces verification cycle
- Ability to screen channels for candidates to perform detailed analysis
- Results based on signal-to-noise ratio of impulse response
- Enables more design cycles to improve design performance
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