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Allegro Package SI 


Virtual interconnect exploration and simulation

Allegro Package SI offers powerful simulation for source synchronous and serial interfaces. The embedded 3D field solver resolves electrical issues early and performs extensive post-layout debugging.

Allegro Package SI Datasheet »
8 resources found
 
Title Type Rated
Cadence IC Package Design Datasheet
Format: .PDF (3.2MB)    Date: 23 May 2011
Datasheet
 41
Recommend!
Memory Design Consideration when Migrating to DDR3 Interfaces from DDR2
Format: .PDF    Date: 11 Feb 2008
Technical Paper
 5
Recommend!
Using Allegro PCB SI GXL to Make Your Multi-GHz Serial Links Work Right Out of the Box
Format: .PDF (1.3MB)    Date: 08 Feb 2008
Conference Paper
 3
Recommend!
Automating FPGA-Based PC Board Designs
Format: .PDF    Date: 15 Sep 2007
Conference Paper
 3
Recommend!
Experience with Using Cadence SiP 1.1 Tools for Advanced SiP Designs
Format: .PDF (2.8MB)    Date: 15 Apr 2007
Conference Paper
 6
Recommend!
Temperature-Aware Design of Printed Circuit Boards
Format: .PDF (1.8MB)    Date: 15 Apr 2007
Conference Paper
 0
Recommend!
Cadence Allegro System Interconnect Design Platform Brochure
Format: .PDF (4MB)    Date: 01 Jun 2005
Brochure
 8
Recommend!
Digital High-Speed Packaging Design and Verification Technical Paper
Format: .PDF    Date: 01 Feb 2004
Technical Paper
 1
Recommend!