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Allegro Package Designer 

Powerful physical package implementation

Cadence® Allegro® Package Designer provides true integration with IC development in a physical co-design environment to help engineers make strategic tradeoffs earlier and with greater confidence.

Allegro Package Designer Datasheet »

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Allegro Package Designer enables constraint-driven substrate interconnect design, extraction, modeling, and signal integrity analysis. The final design output provides automatic system-level handoffs for PCB design in the form of a PCB footprint and schematic symbol.

  • Supports a full front-to-back physical implementation flow for IC package design
  • Determines the best package and substrate options early in the IC design cycle
  • Provides comprehensive design rule- and electrical constraint-driven layout
  • Incorporates design for manufacturing (DFM) methodologies
  • Improves design flow with intrinsic support for all industry standards
  • Models entire design in 3D with the optional Cadence 3D Design Viewer