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IC Packaging and Co-Design 

43 resources found
 
Title Type Rated
Cadence and Faraday Technology Success Story
Format: .PDF    Date: 15 Nov 2013
Success Story
 2
Recommend!
IC Package Route Planning Methodology Designs Better Products Conference Paper
Format: .PDF    Date: 12 Nov 2012
Conference Paper
 4
Recommend!
Allegro Design Workbench Datasheet
Format: .PDF    Date: 22 Oct 2012
Datasheet
 16
Recommend!
Cadence Sigrity Technology Overview
Format: .PDF    Date: 21 Sep 2012
Overview
 2
Recommend!
DDR3 Design-in Kit (Lite Version)
Date: 05 Sep 2012
Downloads
 14
Recommend!
3D ICs with TSVs—Design Challenges and Requirements White Paper
Format: .PDF    Date: 20 Dec 2011
White Paper
 11
Recommend!
Cadence SiP Digital Design Datasheet
Format: .PDF (1MB)    Date: 14 Dec 2011
Datasheet
 0
Recommend!
Addressing the Business Challenge of Building Differentiated Products through Miniaturization White Paper
Format: .PDF    Date: 12 Dec 2011
White Paper
 4
Recommend!
Building Differentiated Products through Shorter, More Predictable Design Cycles White Paper
Format: .PDF (3MB)    Date: 12 Dec 2011
White Paper
 7
Recommend!
Closing the Gaps to Electronics Success through Comprehensive Co-Design White Paper
Format: .PDF    Date: 11 Dec 2011
White Paper
 9
Recommend!
Cadence and VeriSilicon Success Story
Format: .PDF    Date: 27 May 2011
Success Story
 2
Recommend!
Silicon Realization Empowers 3D-ICs with TSVs Technical Paper
Date: 27 May 2011
Technical Paper
 3
Recommend!
Silicon Realization Empowers 3D-ICs with TSVs Technical Paper
Format: .PDF    Date: 26 May 2011
Technical Paper
 1
Recommend!
Cadence IC Package Design Datasheet
Format: .PDF (3.2MB)    Date: 23 May 2011
Datasheet
 41
Recommend!
Archived webinar - Integrated 3D Full-Wave Analysis of Mixed-Signal 3D Packages
Date: 23 Jun 2010
Webinar
 0
Recommend!
Archived webinar - Designing Mixed-Signal PCBs using Agilent ADS and the Allegro PCB RF Option
Date: 16 Jun 2010
Webinar
 0
Recommend!
Silicon Realization Enables Next-Generation IC Design White Paper
Format: .PDF (1.3MB)    Date: 14 Jun 2010
White Paper
 7
Recommend!
Archived webinar - Addressing DDR3 Timing Challenges
Date: 09 Jun 2010
Webinar
 0
Recommend!
Archived webinar - Plan Your Design to Save Time and Reduce Layer Counts
Date: 20 May 2010
Webinar
 0
Recommend!
Archived webinar - Speed up the Design of Your Dense and Complex PCBs
Date: 18 May 2010
Webinar
 1
Recommend!