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Improvements for Design Miniaturization
- Improvements for Flex and Rigid-flex designs include
- Contour Lock while adding interconnect
- Enhanced Arc Editing
- Multi-Line Generator
- 3-D Design and interconnect Viewer
- Constraint-driven HDI design flow
- Exclusive Microvia Stacking rule for HDI designs
- Exclusive Via List DRC
- Via List cross section Viewer
- Elimination of Unused Stacked Vias
- Asymmetrical clearances for RF circuits
High Speed Constraint Driven Flow
- Differential Pair Dynamic Phase Control
- Setting the Dynamic Phase DRC
- New Match Vias Constraint
Productivity enhancements
- Flip Design
- User customizable Data tips
- Placement Replication enhanced to support Interconnects
Etch Edit Productivity Enhancements
- Enhanced Pad Entry, Exit capability
- Support for Jumpers
Interconnect Flow Planner improvements
- Constraint Manager Integration for selection and creation of bundles
- Expanded Rake Functionality to aid in planning
- New Functionality to Select, Get Information and Route plan status
- Faster plan creation through Copy, Move and Split flows
PCB Router Improvements
- Explicit Via Usage in Regions supported at region level
- Micro via stacking rules support
- BB via clearance rules support clearance between Blind/Buried vias and ALL other Via types
Design for Manufacturing
- Pastemask Clearance DRC
- Negative Plane Sliver DRC
RF PCB Design improvements
- Ease of use improvements
- Asymmetrical clearances
- Via Arrays improvements
- Improvements to layout driven design (schematic generation)
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