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Allegro PCB Designer 


Constraint-driven PCB design

Allegro PCB Designer quickly takes simple or complex designs from concept to production in a constraint-driven design system. Its scalable based plus options model allows designers to cost-effectively match the technological and methodological needs of small to large companies and projects.

Allegro PCB Designer Datasheet »
Allegro PCB RF Option Datasheet »

What's New in 16.5 Allegro PCB Design
Allegro PCB Editor
  • Front-to-back flow support for embedded packaged components
    • Supports traditional direct-attach as well as new indirect-attach methods
    • Provides support for open/closed cavities
    • Enables a constraint-driven embedded component design with constraints coming from design intent as well as from the targeted manufacturing approach (direct/indirect, etc.)
  • ECAD-MCAD co-design with ProStep EDMD Schema
    • Incremental design data exchange
    • Accept/reject for each change at object level
    • Notes/history
    • Review changes before accepting
  • Interconnect Flow Designer
    • Hierarchical route planning through bundle creation
    • Assign layers to bundles
    • Create “flow” plans for bundles
  • Use “rakes” to view rat-crossings easily
  • Intelligent PDF output
    • Produces Allegro board data in PDF with intelligent data for components, nets, and test points
    • Users can specify what graphical class/subclass layers may be viewed and what properties are to be extracted (see Allegro Design Publisher below)
  • Associative dimensioning
  • New differential phase tuning eliminates slow approach of tuning differential pairs to meet static or dynamic phase conditions
  • Dynamic trace tapering allows trace width changes across constraint-regions or on simple neck-downs
  • Group route via patterns for easy transition to different layers during multi-line routing
      
    • Differential pair transitions at region boundary provide symmetrical gathering at the boundary when crossed orthogonally or at 45 degrees
    • High-density interconnect (HDI) via-to-via line-fattening control option runs on selected clines
  • Delete unnecessary via structures from design database
  • Highlighting with stipple patterns
  • Separate dynamic and static shape display restored
  • Identify fixed elements with stipple pattern overlays
  • Data tip setup has been expanded to 17 entries
  • Placement using dynamic Design For Assembly (DFA) is now available in Allegro PCB Designer and supports side-end and end-side as distinct rules
  • Placement using dynamic DFA allows users to place components easily with minimum DFA clearance
  • Design for fabrication (DFF)
    • Minimum metal-to-metal clearance support to ensure minimum metal-to-metal clearance is met
  • Duplicate drill check detects duplicate drill holes spanning the same layers
  • Duplicate drill holes may be based on the same or different pad stack definitions
  • Backdrill capability now supports “any layer”-to-“any layer” configurations
  • Cumulative max neck length check
  • Database locking
    • Multi-threading DRC update now takes advantage of up to 16 processor cores running on the same machine
Allegro Design Publisher
  • Publishes Allegro board data in PDF
  • Exports reference designators, component properties, netnames, net properties, and test point data
  • Provides document controls such as options to reduce file size, maximize password security, and minimize property output
Allegro Analog / RF PCB Design
  • Context-sensitive RF PCB design
  • Custom shape import/export from/to Agilent ADS
  • Import hierarchical components in schematics from Agilent ADS
  • Insert a transmission line between two lines
  • Taper a transmission line
Allegro PCB Router
  • Performance improvements
  • Quality of routs (QoR) improvements for differential pairs
  • Alignment of rules with Allegro PCB Editor for HDI rules, inset vias, tangent vias
  • Support for embedded packaged components
  • Acid trap control for micro-vias that are tangent to a core via (automatic line fattening)
  • Via-list prioritization synchronized with setting in Allegro PCB Editor
Allegro Design Planning Option
  • Feasibility analysis and feedback for route plans created using Interconnect Flow Designer
  • Create “spatial” plans using the route engine
  • Convert “spatial” plans to traces (CLINES) quickly