Home > Tools > Cadence PCB Design and SI/PI Analysis > Allegro What's New

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Company Location *

Comments: *

Allegro What's New 

16.6 QIR 7 16.6 QIR 5 16.6 Release 16.5 Release
Approved Manufacturer List (AML) support in ADW library and component browser

Brings component manufacturer data, which is often in a different corporate database, into the ADW library to supplement existing internal part numbers

Provides additional searchable information to design engineers’ desktops

Reduces time to research and choose parts

AML data imported from corporate PLM, MRP/ERP systems
Allegro 16.6 Quarterly Incremental Report »

The Cadence Allegro 16.6 release offers numerous new features and enhancements that make it easy to design PCBs, from the simplest to the most complex. Now users can collaborate across geographically dispersed teams through an efficient design collaboration environment that leverages Microsoft SharePoint 2010. Additional highlights include FPGA “Planning Mode” (auto-interactive pin-reassignment) inside PCB Editor using Allegro FPGA System Planner under-the-hood, and auto-interactive route delay tuning to accelerate timing closure on critical high-speed signals by 30-50%.

Cadence Allegro and OrCAD 16.5 provides customers with new capabilities for a shorter, predictable, and convergent path to product creation. The latest Allegro technology is now available through flexible on-demand product configurations that offer cost-efficiency and scalability. Allegro 16.5 spans silicon, SoC, and system-level development and offers PCB designers benefits such as:
  • Higher functional density with a constraint-driven flow for embedded components
  • Faster timing closure with new PCB interconnect design planning technology
  • Fewer physical prototype iterations with concurrent team design authoring
  • More efficient low-power design with integrated power delivery network analysis
  • A compliant and faster implementation path with package/board-aware SoC IP
  • Smoother collaboration among global teams with new SiP distributed co-design
  • Flexibility through “base plus options” configurations
OrCAD is now more powerful with 3 new PCB configurations: OrCAD Designer Professional, OrCAD Designer Standard and OrCAD Designer Lite that provide the lowest cost of ownership ever.

Each Allegro product area has a “What’s New” tab that provides details on what is “new” for this latest release
Hierarchical Interface-Level Design Across Design Authoring, Constraints, and Layout
Defines and constrains interfaces.

Accelerates design intent authoring with interfaces.

Guides and plans placement using interfaces.

Accelerates routing and timing closure using interfaces with innovative auto-interactive technologies.

Auto-Interactive Interface Trunk Routing, Scribble Routing
Route to trunk for interfaces
Used in conjunction with breakout planning to route main body (trunk) of an interface.



Split view
Initially introduced with Auto-interactive Breakout tuning, users can use split views to see one end of an interface bundle in one view and the other end of the interface in another allowing users to zoom into the two ends.



Scribble routing
Scribble is a simple routing mode that allows you to ‘scribble’ a route path onto the canvas. Once a click is made, the etch solution for the scribble path will be generated. Scribble provides a quick two-pick methodology to generate complex route paths, along with very controlled usage of push/shove based on the scribble path.

Slide Etch During Component Move
Auto re-routes etch to either 45 or 90 degree angles, eliminating time to clean up etch after moving a component that is already routed.



IPC2581 Manufacturing Output Supports Latest RevB Specification
IPC2581 provides an intelligent, robust methodology for driving manufacturing. Allegro PCB Editor has supported IPC-2581 since 16.5 release. This QIR allows users to output IPC-2581 in RevB format and supports enhancements for assembly data (Pin1, Polarity markings, pick up point, and other assembly-related data). For more information about IPC-2581 consortium, visit www.ipc2581.com.

PADS PowerPCB Footprint Library Translation
Allows users to translate PADS PowerPCB footprint library to Allegro® Footprints.

ADW Integration with PTC Windchill for Component Data and Team Design Data Management
Compatible with WC 10.2 M010 release in December 2013.

Provides work-in-progress design data management for PCB designs.

Dynamic Rat Suppression
All rats expect active net are temporarily suppressed during Add Connect.

De-clutters canvas during routing improving designer productivity.

New Drafting Capabilities
Relative move and copy: move and copy elements about a user-specified axis.

Drafting functions introduced in previous QIRs:
  • Add parallel line
  • Add perpendicular line
  • Delete by line
  • Delete by rectangle
  • Offset copy
  • Offset move
  • Relative copy
  • Relative move
Allegro PCB Analog/RF Option Integrates with AWR’s MWO
Support for Microwave Office (MWO) stripline and microstripline library components.

Import schematics from MWO into Allegro Design Authoring (DE-HDL).

Import and export of RF design from MWO to Allegro PCB Analog/RF Option.