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PCB Design 

Bayside Design Inc
Design Challenge
Develop a complete evaluation system for 6.5-Gbps SerDes design, including package, board, FPGA, and software for debug
Complete project in eight weeks

Cadence Solution
Upgraded design environment with Cadence Allegro® system interconnect design platform
 Read Full story »

Huawei Technologies
Design Challenge
Create a next-generation basestation that incorporates extensive new technologies and significant mixed-signal design challenges
Reduce design cycle and improve productivity

Cadence Solution
Provided custom radio frequency (RF) printed circuit board (PCB) module for Cadence Allegro® system interconnect design platform
Created an environment that allowed Huawei to complete their entire PCB design within the Allegro platform
 Read Full story »

IBM
Design Challenge
World's most complex PCBs
Large designs, multiple wide buses
High component pin counts and thousands of board connections

Cadence Solution
Integrated platform—from input to final design
Tabular input of signal information for faster compilations
 Read Full story »

JDSU
Design Challenge
Pin assignment for multiple FPGAs on a new optical network tester board
High-density, multi-port design with 5,500 components and stringent communications requirements
4,596 high-speed nets with constraints

Cadence Solution
Cadence Allegro FPGA System Planner
Cadence Allegro Global Route Environment
 Read Full story»

Liquid Computing Corporation
Design Challenge
Accelerate design schedule for complex high-speed board design to meet critical market window
Adopt an front-to-back high-speed board design methodology to maximize productivity

Cadence Solution
Deployed the Cadence® Allegro® system interconnect design platform
Enabled a high-speed board design methodology that allowed the Liquid Computing team to accelerate their process to meet their schedule
 Read Full story »

Marconi Communications
Design Challenge
Migrate to a new PCB design environment with advanced board design methodologies
Translate INCASES libraries to new platform

Cadence Solution
Provided complete assessment and translation of EDA library infrastructure
Trained team on new platform
 Read Full story »

NVIDIA
Design Challenge
Having HDI design capabilities in a constraint-driven PCB design flow
Driving micro vias quickly and accurately
Reducing the number of layers on customers’ boards
Shortening the PCB layout design cycle

Cadence Solution
High-speed constraint-driven HDI flow to shorten the design cycle while adhering to high-speed rules
Mitigate risk, boost performance, and increase efficiency with a set of proven, unified PCB design, layout, editing, and routing technologies
Collaboration with NVIDIA engineers to streamline time to productivity with the enhanced flow
 Read Full story»

Nvidia
Greg Bodi
Nvidia
Greg Bodi, System Design Senior Manger at Nvidia talks about Allegro PCB products.

Tait Electronics
Design Challenge
Translate legacy UniCAD designs to Cadence Concept® HDL and Allegro® formats
Reduce design cycle time

Cadence Solution
Customized translators and converted libraries from UniCAD to Cadence
Customized Cadence Allegro platform to meet customer design needs
 Read Full story »

VeriSilicon
Design Challenges
Accelerate the design process with automated, placement-aware pin assignment
Optimize the physical connectivity, even as it changes
Ensure quality and reduce complexity with reuse of interface rules and protocols

Cadence Solution
Allegro FPGA System Planner XL
 Read Full story»

Open-Silicon, Inc.
Kavitha Nagarajan
Open-Silicon, Inc.
Kavitha Nagarajan, Lead Engineer – IC Package Design at Open-Silicon, Inc., describes how the company leveraged the Cadence Integrated SPB environment to successfully complete a complex project with a tight deadline.