Home > Products > Manufacturability Signoff > Encounter Diagnostics

Share

  • Email
  • Social Web
* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

Encounter Diagnostics 


Accelerate yield ramp and reduce development costs

Encounter Diagnostics delivers a single, unified engine for both precision and volume diagnostics.

Encounter Diagnostics Datasheet »
Encounter Diagnostics offers a comprehensive solution for silicon bring-up and debug with advanced fault modeling to boost productivity and predictability, reduce development costs, and accelerate time to market. It offers an industry-leading 80-100% defect identification rate as verified by physical failure analysis.

Encounter Diagnostics supports volume and precision operating modes, static and dynamic diagnostics, patented pattern fault modeling, schematic cross-probing between logic and physical models, and all industry-standard automatic test pattern generation (ATPG) test vector formats.

In volume mode, it uses advanced statistical analysis with an SQL compatible database to analyze diagnostic callouts, and failure data to identify the primary yield-limiting issues. Volume analysis supports both logic and physical attributes.

Product Image


In precision mode, it pinpoints nanometer defects using capabilities such as scan-chain diagnostics, advanced callout analysis, diagnostics test pattern generation, invariant analysis, and an advanced integrated GUI analysis

Encounter Diagnostics is available in two offerings:
  • Encounter Diagnostics L (Basic) for precision-based bring-up applications
  • Encounter Diagnostics XL (Volume and Precision Diagnostics Engine Pack), which offers four diagnostics engines and adds volume analysis and enhanced navigation capabilities
Features/Benefits
  • Uses a single, unified engine for precision and volume diagnostics
  • Identifies the most critical yield-limiting design process issues
  • Consistently pinpoints root-cause defects with more than 80% accuracy
  • Isolates faults efficiently with bi-directional cross-probing between logical and physical models
  • Supports physical design browsing and X-Y-Z location reporting
  • Identifies scan-chain defects
  • Locates failures in customer field returns
  • Patented pattern fault modeling optimizes 65nm, 45nm, and 32nm defect identification
  • Universal ATPG vector support enables easy integration with any flow
  • Offers a scalable solution that uses multiple processors or servers and a robust SQL-compatible database
  • Increases the value of your existing yield learning system

 

 Content Query Web Part ‭[4]‬