Global synthesis that enables concurrent optimization of timing, area, and power intentEncounter RTL Compiler offers a unique set of patented global-focus algorithms that perform true top-down global RTL design synthesis to accelerate silicon realization. With concurrent multi-objective optimization (timing, area, and power intent) and support for advanced low-power design techniques, Encounter RTL Compiler reduces chip power consumption while meeting frequency goals.  Encounter RTL Compiler Datasheet » |
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