Accelerate the verification process to ensure first working siliconThe Incisive Xtreme series of high-performance, high-capacity accelerators/emulators enables verification and debug of hardware design prior to committing to silicon, reducing risk and time to market.
 Incisive Xtreme series Datasheet » |
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 The Cadence® Incisive® Xtreme® series of high-performance, high-capacity accelerators/emulators speeds the functional verification of designs at the behavioral, RTL, and gate levels. Designed for multi-user, multi-site, multi-purpose systems, the Xtreme series integrates with the Incisive simulation environment to perform advanced verification planning and drive coverage-based, metric-driven verification closure. It also provides advanced debugging capabilities and eases adoption through instant “hot swap” among simulation, acceleration, and emulation. Although based on FPGA, Xtreme accelerators/emulators are event-driven systems backed by patented and proven re-configurable computing (RCC) technology. Unlike traditional FPGA-based emulators, the Xtreme series’ RCC technology eliminates back-end compile time issues. The Xtreme series of accelerators/emulators is available in Xtreme III Desktop and Xtreme III System configurations.
Features/Benefits
- Speeds bring-up time by automatic mapping of behavioral, RTL, and gate-level implementations to reconfigurable processors
- Delivers higher performance while leveraging existing Incisive simulation environments
- Executes fast transaction-based verification using verification IP
- Enables fast and accurate fault tracing to source using assertion-based verification
- Increases debug productivity with node history storage, eliminating re-simulation
- Provides the fastest path to acceleration
- Boosts acceleration further by mapping behavioral Verilog® or testbench code to equivalent synthesizable RTL code
- Scales with design size
- Speeds debug with software-like capabilities (HW/SW debug and correlation, property violation reporting, event isolation, dynamic extraction of recorded waveforms, logging of runtime messages, warnings and errors, and on-demand memory access)
- Allows running simultaneous jobs and queuing of jobs
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