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Accelerate the verification process to ensure first working siliconThe Incisive Xtreme series of high-performance, high-capacity accelerators/emulators enables verification and debug of hardware design prior to committing to silicon, reducing risk and time to market.
 Incisive Xtreme series Datasheet » |
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 The Cadence® Incisive® Xtreme® series of high-performance, high-capacity accelerators/emulators speeds the functional verification of designs at the behavioral, RTL, and gate levels. Designed for multi-user, multi-site, multi-purpose systems, the Xtreme series integrates with the Incisive simulation environment to perform advanced verification planning and drive coverage-based, metric-driven verification closure. It also provides advanced debugging capabilities and eases adoption through instant “hot swap” among simulation, acceleration, and emulation. Although based on FPGA, Xtreme accelerators/emulators are event-driven systems backed by patented and proven re-configurable computing (RCC) technology. Unlike traditional FPGA-based emulators, the Xtreme series’ RCC technology eliminates back-end compile time issues. The Xtreme series of accelerators/emulators is available in Xtreme III Desktop and Xtreme III System configurations.
Features/Benefits
- Higher performance
- Exercises HW/SW corner cases that may not be practical to run with simulation alone
- Fastest path to acceleration
- Reduces learning curve by leveraging familiar and existing Incisive simulation environment
- Automates the generation of snapshots and scripts
- Provides a unified framework for VPI, SV-DPI, Verilog® XMR task call, and $system task call support
- Advanced debugging and ease-of-use
- Hot swap to/from Incisive Enterprise Simulator, save and restore, advanced memory and behavior compiler, VCD on-demand, and new SimVision replay mode
- Tightly integrated solution
- Incisive Enterprise Simulator “natively” drives Xtreme III
- Provides SimVision waveform viewer (native environment support)
- Ensures simulation and acceleration congruency
- Uses the same reliable RCC compiler for back end (front-end change only)
- Industry-standard language support
- Testbench development: Verilog®, VHDL, Mixed HDL, SystemVerilog, C/C++, SystemC®, and e
- Assertion-based acceleration: OVL, PSL (VHDL), SVA, the Incisive Assertion Library, and UniCov
- SCEMI 2.0: DPI, Macro, and Pipes
- Transaction-based acceleration (TBA): SystemC, C/C++, and e
- TBA verification IP such as PCI Express 2.0
- Incisive Software Extensions |
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