Part of the Cadence VIP Catalog
The Cadence MIPI UniPro Verification IP (VIP) provides a mature, highly capable compliance verification solution for the MIPI UniPro Protocol. Used on multiple production designs, the MIPI UniPro VIP is applicable for IP, SoC, and system-level verification. The VIP is compatible with the industry standard Universal Verification Methodology (UVM) and runs on the Cadence
Incisive Enterprise Simulator and also the Synopsys VCS® and Mentor Graphics Questa® simulators.
| IP developers |
Take advantage of thousands of automatic protocol checks performed by the VIP and the extensive compliance test suite. Be confident in knowing the VIP has been used in thousands of production designs. |
| SoC developers |
One consistent testbench interface spans the entire Cadence VIP Catalog ensuring straightforward chip level verification. Innovative licensing makes it affordable to perform multi-protocol verification. Also compatible with the extensive Cadence Memory Portfolio for full SoC verification. |
Capabilities
- Complies with MIPI UniPro 1.4 specification
- Supports PHY, PA, DLL, Network and Transport layers
- Supports Link Startup, Configuration and (Re-)Initialization sequences
- Supports DLL Initialization, Flow Control and Frame Sequence Number
- Supports TL Connection Management, Address Translation, Segmentation and Reassembly
- Generate constrained-random stimuli for Data frames
- Monitor, check, and collect coverage results
- User-controlled error injection
- Includes the MIPI M-PHY VIP for physical layer verification
- Complies with the Unified Verification Methodology (UVM)
Supported Configurations
The MIPI UniPro VIP includes models for all protocol layers. Each Layer is modeled with an agent that enables full controllability over the generated traffic and the bus Monitor.
|
| Transport layer | Completely models protocol
Supports all packet kinds
Supports Connection Management
|
| Network layer | Completely models protocol
Supports Header Format Analysis
Supports Monitor unit
|
| Data Link Layer | Completely models protocol
Supports all DL packet kinds
Supports Replay timer
Supports Flow control and Preempted packets
|
| PHY Adapter Layer | Completely models protocol
Supports PA Control Protocol (PACP)
Supports Link Startup and Configuration sequences
|
| M-PHY Layer | Completely models protocol (M-PHY rev 0.8) |
Protocol Compliance
The MIPI UniPro VIP includes a monitor programmed with hundreds of automatic protocol checks to verify that the design-under-test complies with the protocol specification.
Language & Methodology Support
The following languages may be used in conjunction with the VIP:
- SystemVerilog
- e
- SystemC
- Verilog
- VHDL
- C,C++
The following methodologies may be used in conjunction with the VIP:
Customer Feedback
"The MIPI Alliance of over 200 member companies develops interface specifications which drive consistency in processor and peripheral interfaces, promoting reuse and compatibility in mobile devices. As a longtime contributing member, Cadence has helped advance the evolution of the several MIPI protocols and their rapid adoption by IP and SoC companies."
Joel Huloux
MIPI Alliance, Inc
Take a Self-Guided Tour
Test drive this VIP on-line via the
hands-on demos at Xuropa.com