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MIPI CSI-2 

Part of the Cadence VIP Catalog

The Cadence MIPI CSI-2 Verification IP (VIP) provides a mature, highly capable compliance verification solution for the MIPI CSI-2 Protocol. Used on multiple production designs, the MIPI CSI-2 VIP is applicable for IP, SoC, and system-level verification. The VIP is compatible with the industry standard Universal Verification Methodology (UVM) and runs on the Cadence Incisive Enterprise Simulator and also the Synopsys VCS® and Mentor Graphics Questa® simulators. The MIPI CSI-2 VIP supports the unique Compliance Management System (CMS) which provides interactive, graphical analysis of coverage results correlated with the protocol specification.

User TypeCadence VIP Advantages and Differentiation
IP developers Take advantage of thousands of automatic protocol checks performed by the VIP and the extensive compliance test suite. Be confident in knowing the VIP has been used in thousands of production designs.
SoC developers One consistent testbench interface spans the entire Cadence VIP Catalog ensuring straightforward chip level verification. Innovative licensing makes it affordable to perform multi-protocol verification. Also compatible with the extensive Cadence Memory Portfolio for full SoC verification.


Capabilities
  • Complies with MIPI CSI-2 specification revision 1.02
  • Verify CSI-2 transmitters and receivers
  • Generate constrained-random content for Frames, Lines, and Packets
  • Monitor, check, and collect coverage results
  • User-controlled error injection
  • Includes the MIPI D-PHY VIP for physical layer verification
  • Supports driving frames from a user data file
  • Complies with the Unified Verification Methodology (UVM)
Supported Configurations
The MIPI CSI-2 VIP includes models for CSI-2 transmitter and Receiver devices. It supports Data transmission on 1 to 4 lanes and Virtual Channel and Data Type Interleaving.

Protocol LayerModel Highlights
CSI-2 interfaceCompletely models protocol
Supports multiple lanes
D-PHY LayerCompletely models protocol (D-PHY rev 0.9)
Supports PPI PHY lane layers
Supports Ultra Low Power Mode (ULPM)
Supports Monitor unit


Protocol Compliance
The MIP CSI-2 VIP provides a highly capable protocol compliance verification solution called the Compliance Management System. CMS includes a verification plan and a full suite of tests. It drives defined, constrained random bus traffic at all layers to offload this time consuming task from you. Injected errors and error conditions are flagged and recovered according to MIPI CSI-2 specifications. The VIP's sequence generation engine applies a context-sensitive approach to test plan execution. This greatly speeds the verification task and increases verification productivity. A cumulative coverage database ensures that the design under test is sufficiently exercised.

Language & Methodology Support
The following languages may be used in conjunction with the VIP:
  • SystemVerilog
  • e
  • SystemC
  • Verilog
  • VHDL
  • C,C++
The following methodologies may be used in conjunction with the VIP:
  • UVM
  • OVM
  • VMM
  • eRM
Customer Feedback
"The MIPI Alliance of over 200 member companies develops interface specifications which drive consistency in processor and peripheral interfaces, promoting reuse and compatibility in mobile devices. As a longtime contributing member, Cadence has helped advance the evolution of the several MIPI protocols and their rapid adoption by IP and SoC companies."

Joel Huloux
MIPI Alliance, Inc

Take a Self-Guided Tour
Test drive this VIP on-line via the hands-on demos at Xuropa.com

 
Try it Now:
Hands-on demos at Xuropa.com