Part of the Cadence VIP Catalog
The Cadence HDMI Verification IP (VIP) provides a mature, highly capable compliance verification solution for the HDMI Protocol. Used on multiple production designs, the HDMI VIP is a proven solution enabling efficient and thorough verification. The VIP supports simulation and hardware acceleration platforms making it applicable to IP, SoC, and system-level verification. The VIP is compatible with the industry standard Universal Verification Methodology (UVM) and runs on the Cadence Incisive Enterprise Simulator
and also the Synopsys VCS® and Mentor Graphics Questa® simulators. The HDMI VIP supports the unique Compliance Management System
(CMS) which provides interactive, graphical analysis of coverage results correlated with the protocol specification.
||Take advantage of thousands of automatic protocol checks performed by the VIP and the extensive compliance test suite. Be confident in knowing the VIP has been used in thousands of production designs. |
||Broad selection of interface VIP and memory models covers the spectrum of SoC protocols and provides a common testbench interface to boost productivity. New accelerated VIP (AVIP) enables performance that is often hundreds to thousands of times greater than with simulation, as is needed for SoC/System level verification.|
||Use accelerated VIP to take full advantage of the speed of Palladium hardware verification systems for performance levels great enough to perform hardware/software integration.
- Complies with HDMI specification revision 1.3a and 1.4
- Verifies Source and Sink devices
- Supports 3D, 4K x 2K Resolution, Expanded Color Spaces and Audio Return Channel (ARC)
- Supports Serial and Symbol interfaces
- Generates constrained-random Video and Audio streams
- Supports High-bandwidth Digital Content Protection (HDCP)
- Supports Consumer Electronics Control (CEC )
- Built-in error injection mechanism
- Integrates with SystemVerilog and e language test benches
- Monitors, checks, and collects coverage on bus traffic
- Complies with the Unified Verification Methodology (UVM)
The HDMI VIP includes models for all protocol components include Sink, Source and Repeater. Each component supports the different Audio and Video formats and compatible with HDMI physical Interfaces.
The HDMI VIP provides a highly capable protocol compliance verification solution called the Compliance Management System
. CMS includes a verification plan and a full suite of tests. It drives defined, constrained random bus traffic at all layers to offload this time consuming task from you. Injected errors and error conditions are flagged and recovered according to AMBA specifications. The VIP’s sequence generation engine applies a context-sensitive approach to test plan execution. This greatly speeds the verification task and increases verification productivity. A cumulative coverage database ensures that the design under test is sufficiently exercised.
To enable users to verify such large designs, Cadence provides the Palladium Verification Computing Platform
in conjunction with high-performance accelerated verification IP
(AVIP). By facilitating the high speed transfer of interface traffic through a design under test in Palladium, Cadence AVIP enables engineering teams to dramatically boost the verification performance of designs at any integration level: IP, subsystem, SoC, and system-level. And, by employing an off-the-shelf solution from Cadence, verification teams can focus on finding bugs instead of developing undifferentiated infrastructure.
Language & Methodology Support
The following languages may be used in conjunction with the VIP:
The following methodologies may be used in conjunction with the VIP:
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Test drive this VIP on-line via the hands-on demos