Industry-leading, production-proven solution with broad platform support
Cadence provides proven, advanced Verification IP (VIP) for the Ethernet protocol. Our Ethernet VIP automates protocol compliance verification, increasing efficiency and predictability while eliminating the need to create and manage thousands of directed tests.
Download the Cadence Verification IP for the Ethernet Protocol Datasheet »
Cadence Ethernet VIP supports all major simulators and simplifies reuse through compliance with the industry-standard Universal Verification Methodology. It also supports accelerated verification, allowing you to trade off verification functionality for speed as you progress from block- to chip- to system-level verification.
Features and Benefits
- Simplifies protocol compliance verification via automated stimulus generation and coverage reporting
- Verifies both physical layer (PHY) and media access controller (MAC) designs
- Supports IEEE 802.3 specifications and functionalities, such as backplane auto-negotiation and forward error correction
- Enables early-adopter functionalities through support of Energy-Efficient Ethernet, Priority-Based Flow Control, and Ethernet Audio/Video standards
- Supports 10Mb, 100Mb, 1Gb, 10Gb, 40Gb, and 100Gb interfaces
- Delivers a fully layered architecture
- Verifies both single- and multi-port Ethernet devices
- Built-in configurable scoreboard measures data integrity
- Supports SystemVerilog, e, and SystemC language testbenches
- Complies with the UVM, ensuring your environment will be plug-and-play
- High level of configurability allows you to focus on any part of your design
- Runs on all leading logic simulators
- Supports Accelerated VIP using the Palladium platform to enable different use modes
