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JasperGold Apps 

The Visualize™ Interactive UI and Debug Environment

Upgrade your verification environment

Our next-generation JasperGold® formal verification platform integrates Cadence® Incisive® formal technology and JasperGold technology into a single platform, delivering a 3X productivity gain and up to 6X performance improvement compared to previous solutions. The platform is part of the Cadence System Development Suite.

The platform includes our JasperGold Apps—targeted solutions that address specific design and verification challenges. The Apps feature a common database that allow you to work seamlessly within and between different applications, where:

  • Work can be shared among applications and design teams though a common database
  • Parallel applications can be launched through a common interface
  • Interaction between applications is simplified
  • Debug and what-if analysis is made easy with the powerful Visualize™ interactive debug environment and with QuietTrace™ technology
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Formal Property Verification App
  • Block-level or end-to-end properties
  • Interactive debug, what-if, and constraint setting
  • High performance and capacity
Sequential Equivalence Checking App
  • Sequential, temporal, and functional equivalence
  • Reference versus modified RTL
  • Side-by-side debug
  • Full chip capacity
Design Coverage Verification App
  • Provides formal coverage metrics
  • Analyzes property set completeness
  • Shows verification from bounded proofs
Coverage Unreachability App
  • Automatically and exhaustively explores the reachability of yet-to-be-hit cover points in the simulation coverage database
  • Exposes bugs with DUT or simulation setup by identifying unexpected unreachable points
  • Saves weeks of time and effort to achieve coverage closure metrics by eliminating true unreachables
Assertion-Based Verification IP
  • Quickly and exhaustively verify compliance to standard protocols
  • Enable automated, encapsulated, plug-and-play capabilities
  • Provide quality support for spec-compliant designs
X-Propagation Verification App
  • Automatic property generation
  • Unexpected X detection and debug
Control/Status Register Verification App
  • IP-XACT input
  • Comprehensive access policy checks
  • Standard and proprietary protocols
Connectivity Verification App
  • Excel or IP-XACT input
  • Sub-system and chip-level connectivity
  • Conditional, combinational, or sequential connections
Structural Property Synthesis App
  • Automatic RTL checks
  • Overflow, dead code, livelock/deadlock
  • Automated and manual property ranking
Behavioral Property Synthesis App
  • Creates properties from simulation traces
  • Automated and manual property ranking
  • SHM, VCD, FSDB, and PLI support
Low-Power Verification App
  • Verifies power-aware formal model
  • RTL and power intent file inputs
  • Structural, functional, and sequence checks
Security Path Verification App
  • Identifies secure data leakage paths
  • Verifies data sanctity and fault-tolerant security