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Home > Products > Incisive functional verification > Design tasks > Transaction-based acceleration
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Incisive transaction-based acceleration 2.0
Part of Incisive® acceleration and emulation
technology, the next generation of transaction-based acceleration—TBA
2.0—reduces verification time by providing new infrastructure and
guidelines to support a reusable accelerated verification environment.
With TBA 2.0, design and verification teams benefit from a 100—1,000x
increase in performance over RTL simulation, or more on designs of 2M
gates or larger. They also benefit from a direct transaction-based
interface to the desired testbench language and a highly productive
simulator-like environment. TBA 2.0 is compliant with both the Accellera
SCE-MI 1.1 and SCE-MI 2.0 draft standards. Unique to TBA 2.0 is the many
Cadence® technology enhancements that improve productivity for customers.
TBA 2.0 is fully supported by the Incisive Enterprise Simulator
and both the Incisive Palladium®
and Xtreme® series
of accelerators/emulators. TBA 2.0 offers several new features that simplify
the creation and debugging of transaction-based test environments, such as a
transaction-level modeling (TLM) direct interface and a native hardware
verification language (HVL) adaptor. These capabilities make the HDL side
code unaware of the HVL language being used, while improving ease of use and
reusability. The same TLMs used for system-level design and as reference models
for RTL development can be used in conjunction with RTL acceleration.
Central to TBA 2.0's effectiveness is the Incisive Enterprise Simulator's unique
congruency feature, which ensures the same results in simulation and acceleration
without needing to change any design or testbench models. This results in much
faster debug and an overall reduction in verification time.
The Incisive TBA methodology supports the Incisive verification IP (VIP) library
of specific protocols such as PCI Express, Ethernet, AHB, and AXI. The Incisive
VIP library delivers fast RTL simulation and high-speed accelerated hardware mode
with a single transactor for both environments. These same transactors support a
high-speed simulation interface for architectural modeling at the transaction level
or for high-level software development.
Key benefits
High throughput | Superior debug capabilities allow transaction-based source-level debug, viewing of transactions and signals within the same window, and automatic transaction recording | | FullVision capability allows access to all design components/signals throughout the whole runtime session | | Performance approaches emulation speed (over 1 MHZ) |
Ease of use | Multi-language native HVL and C/C++ transaction-based adaptors ensure easy migration from the simulation environment (with your desired testbench language), easy debug, and ease of use in creation of VIP models | | Simulation-like environment with full congruency ensures fast "learning curve" and debug for simulation customers | | Constraint and pseudo randomization enables advanced verification capabilities | | Full TBA 2.0 methodology includes scripts, examples, and detailed documents | | Mixed-signal-based and transaction-based acceleration enables fast and incremental bring-up of design and verification environments | | Multiple synchronization modes provide high flexibility | | Hybrid mode enables a combination of TBA and in-circuit emulation in a single configuration and allows customers to migrate from one mode to another | | Automatic variable length messaging reduces testbench creation time and optimizes testbench efficiency | | TBA performance profiler locates any performance bottlenecks and helps users modify their testbench to achieve the highest possible performance |
Standards support | Direct TLM connection enables direct connection to a design written in a high-level of abstraction | | SCE-MI 2.0 standard compliance enables customers to plug-in third-party VIP |
Resources
EE Times article: Transaction Models Offer New Deal for EDA
Incisive newsletter  | Article 6: An Integrated block Level Verification Approach from Simulation to Co-emulation | | Article 7: Leading Edge Transaction-based Acceleration Methodoogy |
Webinar: Leveraging Transaction-based System Verification to Increase Productivity, Predictability, and Quality
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