3D full-chip parasitic extraction and analysisProduction-proven and independent of design style or flow, Cadence QRC Extraction is the industry's premier 3D full-chip parasitic extractor for fast and accurate implementation and validation of complex designs. Cadence QRC Extraction Datasheet » |
|
|
|
|
Cadence ® QRC Extraction includes a full spectrum of technologies for all nanometer-scale design styles including RF, analog, mixed-signal, custom digital, and cell. These advanced capabilities include RLCK extraction, advanced process modeling, multi-corner and statistical extraction, distributed processing, netlist reduction, substrate parasitics extraction, an integrated field solver, and hierarchical extraction. With Cadence QRC Extraction, designers have an easy-to-use solution for rapid analysis to achieve faster timing closure and higher quality of silicon.
Features/Benefits
- Reduces risk of re-spins with accurate, 3D full-chip extraction
- Increases ROI with first-time accurate and consistent setup for all design styles
- Shortens design cycles by integrating with comprehensive design and analysis environments
- Speeds convergence for timing closure by integrating with analysis technologies
|
|
|
|
|