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NanoRoute Advanced Digital Router 

Total routing convergence on timing, area, power, signal integrity, and manufacturability goals

NanoRoute™ Advanced Digital Router is the industry-leading unified routing and interconnect optimization solution that helps designers quickly achieve concurrent timing, area, signal integrity, and manufacturability convergence during digital implementation.

NanoRoute Advanced Digital Router Datasheet »
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Advanced process node designs require a new generation of physical-, electrical-, and manufacturing-aware routing technology. In all designs today, power and manufacturability issues are enormous and interdependent with timing, signal integrity, and area requirements. In addition, 20/16/14nm advanced node processes create new considerations in the form of double patterning and FinFET device usage, requiring the router to balance multiple design objectives concurrently while mitigating on-the-fly any potential risks to performance and yield. Last, but not least, a viable router must have the speed to meet aggressive time-to-market schedules.

NanoRoute Advanced Digital Router handles all routing challenges at both block- and chip-levels. It combines the performance characteristics of a grid-based router with off-grid flexibility, and it simultaneously evaluates and optimizes interconnect topology based on the 3D effects on timing, area, power, manufacturability, and yield. Powered by a super-threading backplane (multi-threaded and distributed processing combined), the NanoRoute solution finishes millions of nets of connectivity per hour. It delivers the highest quality of results in a fraction of the time taken by other routers on the market. 20/16/14nm design requirements, including double patterning and FinFET support. Using a correct-by-construction approach, the NanoRoute Router resolves potential double-patterning conflicts on-the-fly for a routing topology that is not only double patterning- and advanced DRC-correct the first time, but is also more area efficient.

Fully certified/qualified by foundries to support the latest 20/16/14nm process rules
  • Ensures design and routing convergence for designs integrated with advanced process technologies
  • Supports correct-by-construction double patterning with FlexColor routing technology
Enables the implementation of high-performance designs on advanced or mainstream process technologies
  • Mitigates process variation by supporting a wide range of advanced node processes
  • Improves overall quality of results, maximizes utilization, and meets multiple design objectives
  • Shrinks die size by 5-10% with robust routing technology and congestion handling results
  • Offers higher capacity for larger, more complex designs
Enhances productivity through efficient single-CPU and multi-CPU performance
  • Delivers 10x or more performance gain using super-threading technology
  • Speeds turnaround time with dynamic multi-thread and distributed processing capability
Ensures a smooth path to design tapeout and production silicon
  • Offers a silicon-proven track record with successful customer tapeouts and foundry endorsements