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Digital Implementation 

Press Releases
Faraday Increases Performance of its Largest SoC By Utilizing Cadence Digital Implementation and Verification Solutions
New Cadence Voltus IC Power Integrity Solution Gives IDT Up to 10X Power Signoff Speed-Up
Cadence Introduces Voltus IC Power Integrity Solution, Delivering Exceptional Performance and Capacity in Power Signoff

Articles
TSMC Validates Cadence 3D-IC Technology for Its CoWoS(TM) Reference Flow
Cadence tools tape out 20-nm SoC test chip for ST
Cadence reveals latest RTL to GDS flow

Events
CDNLive EMEA 2014
05/19/2014 - Munich
TSMC Technology Symposium 2014
04/22/2014 - 22 Apr — San Jose McEnery Convention Center, San Jose, CA; 29 Apr — Westin-Waltham, Boston, MA; 01 May — Hilton (Downtown), Austin, TX

More events »