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Custom IC Design

Press Releases

TowerJazz Reference Design Flow 2.0 Fully Qualifies Cadence Mixed-Signal Solution and Process Design Kit

Fuji Electric Cuts Development Time 25 Percent with Cadence Virtuoso Accelerated Parallel Simulator

	Cadence Enables ST-Ericsson to Achieve Significant Productivity Gain for its 40-Nanometer Baseband Chip Design

Articles

Realizing the Promise of Electrically-Aware Custom IC Design

360 Degree enhanced unified custom/analog flow from Cadence

	Custom/Analog Design Developments Meeting 65nm And Below Challenges

Events

	Design Automation Conference (DAC) 2012 06/03/2012 - San Francisco
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Archived Webinars

Archived Webinar: Industry Leaders Unveil Shared Vision for 20nm – Cadence and IBM Present a Custom 20nm Solution

Archived Webinar: Industry Leaders Cadence, TSMC, and ARM Outline their Vision for 20nm Silicon Success

Archived webinar - Bringing Order to the Chaos of IC Design: Solutions for the SoC Era

Archived webinar: ViVA IC615 - See the New Graphing Technology

	Archived webinar - Cadence and IC Manage - IP Reuse and Parasitic-Aware Design Using Cadence Virtuoso Technologies and the IC Manage Global Design Platform
More archived webinars »