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Custom IC Design 

Press Releases
Cadence Significantly Accelerates Chip Design With New Virtuoso for Electrically Aware Design
Cadence and TSMC Strengthen Collaboration on Design Infrastructure for 16nm FinFET Process Technology
ARM and Cadence Partner to Implement Industry’s First Cortex-A57 64-bit Processor on TSMC 16nm FinFET Process

Electrically-aware design improves analog/mixed-signal productivity
Taming The Challenges Of 20nm Custom/Analog Design
TSMC Validates Cadence 3D-IC Technology for Its CoWoS(TM) Reference Flow

Technology on Tour Singapore 2014
08/15/2014 - Marina Mandarin Singapore Hotel

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