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Custom IC Design 

Press Releases
Cadence Unveils Next-Generation Virtuoso Platform Featuring Advanced Analog Verification Technologies and 10X Performance Improvements Across Platform
Cadence Design Tools Certified for TSMC 7nm Design Starts and 10nm Production
Mellanox and Cadence Demonstrate PCI Express® 4.0 Multi-Lane PHY IP Interoperability

Articles
Electrically-aware design improves analog/mixed-signal productivity
Taming The Challenges Of 20nm Custom/Analog Design
TSMC Validates Cadence 3D-IC Technology for Its CoWoS(TM) Reference Flow

Events
CDNLive EMEA
05/02/2016 - Dolce Hotel Unterschleissheim
Design Automation Conference - DAC 2016
06/05/2016 - Austin
CDNLive Korea 2016
07/13/2016 - Seoul

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