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Home > Plan-to-Closure Methodology |
PLAN-TO-CLOSURE METHODOLOGY
Shrinking geometries, complex design techniques, and tight schedules can quickly overwhelm conventional verification approaches. To accurately predict when you'll get a design out the door, you need an automated plan- and metric-driven approach to system-level verification closure, not just a gut feeling.
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Why take the risk when you can take a predictable path to verification closure? Automate and manage your entire verification process at block, chip, and system levels—and leverage industry best practices—with the Cadence® Incisive® Plan-to-Closure Methodology.
Using an executable plan and a metric-driven approach, you can boost your productivity, increase design predictability, and achieve system-level quality.
- Benefit from full metric- and plan-driven verification
- Start verification earlier using assertions
- Build efficient and reusable mixed-language verification components
- Achieve system-level verification closure
To access the full Plan-to-Closure Methodology, Cadence customers can go
to downloads or
to My Plan-to-Closure.
If you are not a Cadence customer, please
click here to preview the Plan-to-Closure Methodology.
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The Incisive Plan-to-Closure Methodology includes several main verification components, shown below. Each component works independently but is also fully integrated using a Design Team or Enterprise Plan-to-Closure flow.
Click a verification topic to view related information like, articles, demos, white papers, etc.
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Verification planning and management provide documented best practices, golden examples, and tutorials to help design and verification teams reduce project risk by using a plan- and metric-driven approach to reach verification closure.
To access the full Incisive Plan-to-Closure Methodology, Cadence customers can go to downloads or to My Plan-to-Closure. If you are not a Cadence customer, please click here to preview the Plan-to-Closure Methodology.
Assertion-based verification provides documented best practices, golden examples, and tutorials to help design and verification teams leverage assertions throughout the verification process.
To access the full Incisive Plan-to-Closure Methodology, Cadence customers can go to downloads or to My Plan-to-Closure. If you are not a Cadence customer, please click here to preview the Plan-to-Closure Methodology.
Testbench automation and reuse provides documented best practices, golden examples, libraries and utilities, and tutorials to help design and verification teams create reusable verification components at the block, chip, or system levels in e, SystemVerilog, SystemC, or mixed verification languages. The Open Verification Methodology (OVM), scheduled to be available in Q4 2007, will enable backwards compatibility with the Plan-to-Closure Methodology testbench existing environments. Plan-to-Closure verification components ensure higher quality results.
To access the full Incisive Plan-to-Closure Methodology, Cadence customers can go to downloads or to My Plan-to-Closure. If you are not a Cadence customer, please click here to preview the Plan-to-Closure Methodology.
Full system verification provides documented best practices, golden examples, libraries and utilities, and tutorials to help design and verification teams perform verification at the chip and system levels. It covers everything from transaction level-models to hardware/software verification to transaction-based acceleration and full system emulation.
To access the full Incisive Plan-to-Closure Methodology, Cadence customers can go to downloads or to My Plan-to-Closure. If you are not a Cadence customer, please click here to preview the Plan-to-Closure Methodology.
Verification IP (VIP) is created using the Incisive Plan-to-Closure Methodology. All Plan-to-Closure VIP is plug-and-play. Cadence and third parties collaborate to provide the broadest VIP solution for complex protocols and buses required in today's most demanding applications. These include PCI Express, AMBA AHB and AXI, Ethernet, USB, PCI, OCP, and SATA. Cadence Verification Alliance partners provide another 20+ protocols.
To access the full Incisive Plan-to-Closure Methodology, Cadence customers can go to downloads or to My Plan-to-Closure. If you are not a Cadence customer, please click here to preview the Plan-to-Closure Methodology.
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Cadence Attacks Assertion-Based Verification Bottlenecks - EE Times
Claiming to reduce key bottlenecks in assertion-based verification, Cadence Design Systems has announced enhancements to the "design with verification" component of its Cadence Logic Design Team Solution.
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Demo - Compliance Management System Automates Compliance Verification
Verifying protocol compliance is typically time consuming and requires extensive protocol expertise. This demo shows the new Cadence Compliance Management System (CMS) that automates compliance verification. With CMS, you can reach 70+% functional coverage without writing a single test. We'll show you how easy it is to apply CMS to your AMBA or PCI Express verification project, and we'll give an overview of the extensive Cadence VIP portfolio.
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The Incisive Plan-to-Closure Methodology is optimized for use with the Incisive functional verification platform. The following technologies are an integral part of the plan, execute, measure, and react phases of the Plan-to-Closure flow for logic design teams and enterprise multi-specialist teams.
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Incisive Design Team Manager and Enterprise Manager automate the Plan-to-Closure flow-from generating an executable verification plan, to launching sessions during the execute phase, to measuring the results and providing a metric-driven view for use during the react phase. Both products automate the tasks that would otherwise require intensive human interaction, custom-software development, or are simply impossible to achieve manually.
More information »
Incisive Design Team Simulator and Enterprise Simulator are the engines that execute the assertions or the testbench environment during simulation. Incisive simulators also provide an integrated graphical user interface, a robust debug environment, support for SystemVerilog, e, and SystemC® languages, and support for PSL, SVA, and OVL assertions. For e-based testbench automation, Incisive Enterprise Specman® Simulator is available.
More information »
Incisive Formal Verifier shortens design and verification time while improving design quality. It provides a formal means of verifying RTL functional correctness with assertions, before the testbench simulation environment is available, and is an effective means to providing predictable, fast RTL block bring-up. Formal verification plays a key role in the execute phase of the Plan-to-Closure approach.
More information »
Incisive Acceleration and Emulation accelerates the verification process and enables first-working silicon with first-working software. Using transaction-based acceleration or in-circuit emulation during system verification significantly improves time to market and quality of your end product. Both acceleration and emulation are an integral part of the Plan-to-Closure Methodology and be can be used in conjunction with the Incisive Design Team Manager or Enterprise Manager for the most productive full system verification.
More information »
Incisive Verification IP (VIP) and third-party VIP delivers the industry's most complete protocol verification solution. All VIP is ready to plug-and-play within your Plan-to-Closure verification environment. Incisive VIP covers verification planning and management and includes the Compliance Management System, whichi includes an executable verification plan (vPlan), a compliance test suite and a full set of compliance metrics, assertion-based VIP (formal, simulated, and accelerated), simulation-based universal verification components (UVCs) for automated testbench, and SpeedBridge Adapters used in emulation. No other verification provider can match the full Cadence Plan-to-Closure VIP solution.
In addition to Cadence VIP, our Verification Alliance partners provide Plan-to-Closure VIP.
More information »
The Incisive Plan-to-Closure Methodology is a map that steers verification based on optimized methods that have been tested on real projects. It meets the broad spectrum of verification needs, from designers verifying blocks, to logic design teams, to enterprise multi-specialist teams who rely on the most advanced verification techniques. The Plan-to-Closure Methodology includes:
- Knowledge System, a web-based portal technology that includes documented best verification practices and reuse guidelines that apply across application spaces, helping teams quickly learn and incorporate the methodology,
- Golden executable examples that help you learn and apply the methodology and serve as a template, and
- Libraries (code building blocks and utilities) that automate the process and eliminate many redundant verification coding tasks.
More information »
The SoC Functional Verification Kit teaches users how to incrementally adopt and use all aspects of the Incisive Plan-to-Closure Methodology. The kit combines a comprehensive and realistic ARM968-based wireless design consisting of over 30 design blocks and 16 verification IP blocks, with workshops and hands-on labs, to quickly take methodology beyond textbook and into an instant, re-usuable, and working verification environment. Using the kit and its methodologies has been proven to reduce risk, improve productivity and improve the quality of verification.
More information »
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Cadence offers a number of user resources to help you implement a Plan-to-Closure flow, including:
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Plan-to-Closure Knowledge System
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My Plan-to-Closure
My Plan-to-Closure is a secure web space where engineers and their teams can assemble a customized set of methodology resources, including those from Cadence, from their internal groups, or from third parties.
Features include the ability to:
- Personalize your view of methodology documentation, such as selecting the methodologies to view and hide, and bookmark information
- Add your own or third-party information to your view. Use the link provided here to access the My Plan-to-Closure web space and bookmark it for future reference
My Plan-to-Closure is availble to Cadence customers with an active SourceLink account. Click here »
If you are not a Cadence customer, click here to preview the Plan-to-Closure Methodology
Community Plan-to-Closure
Community Plan-to-Closure is a Knowledge System resource provided with the Incisive Plan-to-Closure Methodology. Here you'll find a discussion forum and a resource center that support the methodology. It is available to methodology users including customers, Verification Alliance Partners (who provide consulting or deliver third-party VIP), and Cadence field experts (who work with customer project teams every day).
Resources include:
- A methodology forum
- Conference papers and presentations
- FAQs and company-registered prefixes
- Software downloads, such as contributed code and libraries
Sign up »
Incisive Plan-to-Closure Methodology Release Download
The Incisive Plan-to-Closure Methodology spans verification planning to verification closure. It includes executable golden examples, technology libraries, templates, and tutorials.
Topics covered include:
- Verification planning and management
- Assertion-based verification
- Testbench automation and reuse
- Full-system verification
Click here to download the release. Once on the Cadence downloads page, enter your Cadence SourceLink username and password, select platform and Incisive Plan-to-Closure Methodology 6.1.
The Cadence Designer Network User Community is a central location for users to share their knowledge and experience with other design and verification engineers year round.
The site has a rich set of user-authored technical content including articles, interviews, and papers. It also includes user-contributed product reviews, screen shots, and videos. User-to-user forums on a variety of topics support an exchange of ideas, challenges, and methods to use Cadence technology effectively. Interactive features encourage users to rate and comment on content throughout the site.
Functional Verification Zone
Functional Verification Zone includes this week's featured articles and "What's Hot." Click here »
Functional Verification Zone articles are broken into two topic areas:
Forums
Forums include: e and shared code, e files, SystemVerilog, verification planning, assertion-based verification, and formal analysis, simulation, acceleration, emulation. Click here »
Thank you for your interest in the Cadence® Low-Power Solution. A Cadence representative will get back to you within two business days.
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