OpenChoice Program
The Cadence OpenChoice program enables interoperability and facilitates open collaboration with leading IP providers to build, validate, and deliver accurate models for Cadence design and verification solutions. The program aims to ensure IP quality, integration, and provides engineers access to a broad IP offering through a complete IP catalog. This optimizes the electronics design chain and accelerates customer time to market.
Key Program Benefits
 | Leading industry IP providers, both Digital and Custom IC design | | Comprehensive quality standards | | Fully validated reference flows from RTL to GDSII to Silicon Package board | | Integrated sales and support models | | Comprehensive IP Catalog |
Featured partners
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ARC International is a leader in configurable subsystems and CPU/DSP processors used by semiconductor companies worldwide for leading-edge SoC design
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Design and verification solutions optimized for successful design of ARM core-based SoCs
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DDR PHY hardening methodology using the Cadence Encounter digital IC design platform to reduce implementation time.
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Designs and licenses the industry's highest performance 32- and 64-bit architectures and cores
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Exclusive EDA sales channel for its RaSer serial link IP product
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A total nanometer design solution, a qualified platform in TSMC Reference Flow 5.0
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Embedded memory cores production tested and optimized for area, power and speed
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Complete listing of our OpenChoice members
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