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CDNLive! is a global series of technical conferences that bring customers together for face-to-face interactions. At CDNLive! Silicon Valley 2006 (September 12-15), you'll have the opportunity to talk with other designers using Cadence technology—and with the Cadence people who develop the technologies—to help you face your design challenges.

Come share ideas and network with other customer designers and expand your knowledge by attending paper sessions as well as technology demos and techtorials. Featured custom design panels and papers:

• Design challenges panel: Dealing with analog and RF design challenges at 90nm and below
• Technology panel: How to use optimization to address analog design productivity and increase performance
• Paper session: Top-down mixed-signal design using Virtuoso and Encounter platforms
• Paper session: Constraint-driven full custom circuit design
• Paper session: A comparison of RF simulation technologies from an application perspective
• Paper session: Select lock – a lesson in skill performance

The Cadence Designer Network steering committee is pleased to announce the launch of an enhanced user community website.

Registered members from the former Virtuoso community are registered automatically for this new community; your username and password are preserved. Technical papers, customer interviews, and forum postings have all been migrated to the new user community.

Visit today and find enhanced features such as member-contributed product reviews and product demonstrations.

Cadence and TSMC Accelerate 65-Nanometer Design with TSMC Reference Flow 7.0

Cadence Delivers New Space-Based, Full-Chip Router for Advanced Mixed-Signal and Custom Digital Designs

Hong Kong's ASTRI Reconfirms Cadence as Key EDA Solutions Provider

TSMC Adds Cadence Technologies for 65-Nanometer Design

KPIT Cummins Infosystems Adopts Cadence Analog Mixed Signal Methodology Kit

Virtual prototyping speeds mixed-signal IC design

Capturing and applying design intent

Full-chip verification for analog/mixed-signal ICs

Transitioning to Manufacturing-Aware Design

Toward surgical approach to design

Space-Based, Full-Chip Router Takes On Mixed-Signal And Custom-Digital Designs

Constraint-driven physical design speeds IC convergence

Cadence delivers space-based, full-chip router

Routing tool retains data for incremental improvement

PDK functionality tackles length of diffusion effects

Will Analog-RF Designs Ever Truly Fit in the SoC World?

Facilitating System-in-Package (SiP) design

Designers cast a skeptical eye on mixed-signal SOCs

•	Listen to the Cadence AMS Kit Fireside Chat Pod Cast featuring members of the vertical and trade media as well as Cadence customers.
•	Cadence RF SiP Methodology Kit and SiP technologies enable system-level IC and package co-design

Sequoia and Cadence develop world-class new RF transceiver architecture
View video »

Bitwave and Cadence combine to develop software-defined radio
View video »

Sandbridge and Cadence set out to revolutionize mobile handsets with a multi-threaded DSP architecture
View video »

Cadence and Alereon partner to design the world's highest performance ultrawideband chipset
View video »