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  The Cadence® Virtuoso® custom design platform eNewsletter keeps you informed about important issues, technology updates, and solutions in analog, custom-digital, RF, and mixed-signal design. This forum strives to address custom design challenges that are relevant to your needs, so please share your feedback with us at: virtuoso@cadence.com.

The Virtuoso custom design platform—delivering silicon that's right, on time
Teams working on advanced custom designs face a triple threat—economics, design complexity, and physical effects. In today’s market, competitive design requires a fast, silicon-accurate custom design platform that addresses these issues. To view an interactive presentation on this topic, please click here.

NEWS
Cadence Expands Design-for-Manufacturing Offering with Solution for Lithography-aware Design
The Virtuoso RET Suite allows designers to precisely model and analyze designs for lithography criticality and improved yield.
Cadence Virtuoso Speeds Design and Verification of Sirific's 3.5G Cellular Transceivers
Virtuoso UltraSim Full-chip Simulator cuts verification time from weeks to hours.
Cadence Delivers New RF Design Kit Targeting Customer Design Challenges in Wireless
The latest kit continues Cadence execution on strategy to address key vertical market applications.

ARTICLES
Cadence Spins "Secure" DFM Model, Makes Custom Layout Litho Savvy
Releasing the first fruits of its DFM partnership with ASML, Cadence unveils a new process model for sharing sensitive IC-manufacturing data with design tools and a suite that makes the Virtuoso full-custom layout tool lithography savvy.
Lithography-aware Design Enables "Extreme" RET
The continuous progress and improvements in lithography hardware are not able to sustain the rapid migration to more advanced nanometer nodes with sub-wavelength features without the help of EDA software. In moving to 130nm and below, the “data” content of semiconductor manufacturing — and especially lithography — is ever increasing.
Cadence Litho-aware DFM Tool Aims to Improve Yield
Aiming to extend 193nm lithography to 45nm processes and beyond, Cadence made strides in improving manufacturing yield with its Virtuoso Resolution Enhancement Technology (RET) Suite, meant to integrate lithography awareness directly into the Virtuoso custom design platform.
Cadence Rolls RET into Flow
Resolution enhancement technology (RET) has been a batch process that takes place after IC layout — but it shouldn't be that way at 65nm and below, according to Cadence. The company introduced a tool set that brings "lithography awareness" into the Virtuoso custom design platform.
Sirific Used Cadence Simulator in Designing Its RF Transceiver
Sirific Wireless, a fabless RF semiconductor company, has successfully designed its single-chip CMOS RF transceiver for HSDPA/WEDGE using the Cadence Virtuoso UltraSim Full-chip Simulator for FastSPICE simulation.
Cadence 'Catena' Rolls Layout Optimizer
Cadence rolled out Chip Optimizer, a post-route interconnect optimization tool that claims to improve both performance and manufacturability.
In-house Startup Delivers DFM Tool
Anyone who says that big EDA companies can't innovate will get a quick retort from Richard Brashears, head of the Cadence Catena project, which unveiled its first product.
SoC Transceiver Tool Kit Speeds Optimization of Wi-Fi, UWB, Wimax Designs
Cadence RF Design Methodology Kit helps wireless chip designers shorten design cycles and optimize performance by integrating several point tools and establishing a reliable, proven methodology for designing transceivers in a 180nm CMOS process.
Methodology Kit Aims at Easing RF IC Design
Cadence released a methodology kit for RF IC design. The kit includes a complete tool flow from system design through physical verification, along with a reference design, testbenches, and, for the first time, harmonic-balance simulation.


VIRTUOSO COMMUNITY
The Cadence Designer Network Steering committee is pleased to announce the launch of an enhanced user community website at www.cdnusers.org. This site consolidates various former sites into one, providing a single central location for Cadence users to exchange information and collaborate on design solutions.

Registered members from the former Virtuoso community are registered automatically for this new community; your user name and password are preserved. Technical papers, customer interviews, and forum postings have all been migrated to the new community.

Visit www.cdnusers.org today and find enhanced features such as member-contributed product reviews and product demonstrations.

THE CADENCE RF DESIGN METHODOLOGY KIT
The new Cadence RF Design Methodology Kit addresses key RF challenges:
Intelligently manage parasitic extraction
Link system-level design with IC implementation
Accurately and rapidly verify complete wireless designs

View more information »

CADENCE ENGINEERING SERVICES
Cadence Engineering Services can help you meet your broader business and project goals by collaborating with you on the appropriate choice of flows; offering design expertise; enabling IP; and developing partnerships. Each services engagement is tailored to your specific design, budget, and schedule requirements.

TRAINING & EDUCATION SERVICES
Our “Advance with Engineer Explorer” courses are designed for those with working knowledge of Cadence and who are ready for a deeper exploration of advanced topics and more sophisticated strategies. Now available:

Behavioral Modeling with Verilog-AMS
This advanced course provides an in-depth approach to behavioral modeling for analog and mixed-signal design blocks and systems. Prerequisite: Working knowledge of Virtuoso AMS Designer Simulator.
SKILL Programming for IC Layout Design
This advanced course focuses on layout design tasks for cell design, cell validation, library updates, and parameterized cells (Pcells). Prerequisite: Working knowledge of SKILL programming and Virtuoso Layout Editor.

For complete information, click here »



WHAT'S NEW  
Check out the new Virtuoso Resolution Enhancement Technique (RET) Suite, which embeds the expertise of the process flow in the design environment, allowing you to create manufacturable designs without needing to become an expert in manufacturing.

The Cadence Designer Network steering committee is pleased to announce the launch of an enhanced user community website at www.cdnusers.org. This site consolidates various former sites into one, providing a single central location for Cadence users to exchange information and collaborate on design solutions.

Registered members from the former Virtuoso community are registered automatically for this new community; your user name and password are preserved. Technical papers, customer interviews, and forum postings have all been migrated to the new community.

Visit www.cdnusers.org today and find enhanced features such as member-contributed product reviews and product demonstrations.




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