Cadence Kits
Incisive functional verification
PRODUCTS
Verification management
Formal analysis
Testbench automation
Simulation
Acceleration/emulation
Analog-mixed signal
Verification IP
Plan-to-Closure Methodology
DESIGN TASKS
Enterprise system-level verification
Transaction-based system verification
Transaction-based acceleration
Assertion-based verification
Building an emulation environment
Verification Methodology for SOC's
Encounter digital IC design
Virtuoso custom design
Allegro IC-PKG-PCB co-design
OrCAD PCB design
System-in-package design
Design for manufacturing
IP catalog
Print-friendly version

Incisive Verification Newsletter

The Cadence® Incisive® platform eNewsletter discusses current issues and challenges, new technologies, proven methodologies, applications, and the latest solutions for successful functional verification. The quarterly publication provides you with:
  • Articles
  • Events
  • Technical documents
  • News and announcements
 
Current issue



Incisive newsletter Q407 issue   
In this issue of the Cadence® Incisive® eNewsletter, find out about the latest functional verification and logic design news; learn about the new technologies in the Incisive Enterprise verification family of products; discover the latest on the Open Verification Methodology for SystemVerilog; watch an online demonstration on the SoC Functional Verification Kit; and read technical tips from users. Also, visit www.cdnusers.org to read the latest interviews, forum postings, and articles.

Past issues



Email the editor



Questions or comments about the Incisive Verification Newsletter? Email the editor

Subscription form



Registering is easy. Simply fill out the online subscription form and we'll send you a summary version of Incisive platform eNewsletter via email, with hyperlinks that will take you directly to the full articles. Subscribe now!