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Highlights
Cadence Completes Acquisition of Jasper Design Automation
Fast Debug of RTL / Speedy Analysis – See How
Find Out How CSR Increased Their OS Bring-up by 200X
R&D Spotlight

 

Video ImageIn this video, Andy Eliopoulos, VP R&D, Advanced Verification, Cadence, examines why point EDA tools can't properly address verification demands brought on by increasing system complexity. Cadence® Editor-in-Chief Brian Fuller interviewed Eliopoulos at DVCon 2014

Optimizing Your Verification Process with Incisive vManager Solutiones

By Paul Carzola, Solutions Architect, Cadence

P Carzola ImageVerification is getting harder, and today it takes a team to verify complex IP blocks, SoCs, and large FPGAs. In this environment, verification planning and management systems are a must for virtually any verification program. Solutions built for single verification engineers running on a single simulation engine are no longer enough. 

In this webinar, Paul Carzola, a Cadence solutions architect, covers the challenges and introduces Cadence’s new Incisive® vManager™ verification planning and management solution. Fueled by client-server technology, a database-driven architecture, and a robust and proven metric-driven verification methodology, the Incisive vManager solution enables team-based verification, encompassing multi-user collaboration, broad-based multi-engine controllability, and dependency visibility and controllability. 

Analyzing and Debugging Performance Issues with Advanced ARM CoreLink System IP Components

By Nick Heaton, Senior Solutions Architect, Cadence, and William Orme, Strategic Marketing Manager, ARM Ltd.

N Heaton ImageFinding the optimal configuration options that meet the requirements of a particular system requires complementary design tools that equip you to rapidly explore and correlate trade-offs in performance, power, and area (PPA). This paper describes the challenges confronting the designer and proposes a new tool leveraging ARM® and Cadence technologies to overcome the challenges of today’s highly integrated, multi-processor SoC designs.

 

 

DAC 2014 – Five Mega Trends for System Design and Verification

By Frank Schirrmeister, Product Marketing Director, Cadence

F Schirrmeister ImageLooking back at DAC 2014, five mega trends for system design and verification stick out for Frank Schirrmeister: software everywhere, application verticals, the importance of ecosystems, blurring lines between execution engines, and links to new adjacencies. Most importantly, though, DAC 2014 was another example of how real users achieve real and quantifiable results using system design.




 

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