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EDA(Electronics Design Automation)분야의 세계 최대 마켓리더인 케이던스(Cadence Design Systems Inc.)는 전세계 반도체, 통신장비, 멀티미디어 및 가전제품 회사들이 다양한 제품을 적기에 개발하고 생산할 수 있도록 EDA 소프트웨어와 디자인 서비스를 제공하고 있습니다. 미국 캘리포니아주 산호세에 본사를 두고 있으며, 세계 주요지역에 현지법인, 연구소, 디자인센터를 두고 있습니다. 회사소개(About Cadence Korea).



Cadence Library Characterization Scripts Now Available in New TSMC Reference Kit

New Library Characterization Reference Kit from TSMC Enables Faster Library Re-Characterization

SAN JOSE, Calif.. 17 Oct 2011

Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that it has collaborated with TSMC to provide mutual customers access to a library characterization reference kit. The Cadence® Library Characterizer (Altos Liberate) reference kit for TSMC’s standard cell libraries is now available to TSMC customers for download on TSMC-Online. The reference kit, along with the Cadence Library Characterizer technology, enable customers to re-characterize their standard cell libraries in-house, on their own schedule with the same characterization technology and setup used internally at TSMC, delivering better consistency.

“Through our work with TSMC on the mission-critical challenge of foundation IP characterization, customers can now leverage the same technology used in-house at TSMC with the same setup and constraints, helping them address the specific design challenges created through changes to their standard cell libraries,” said Wilbur Luo, group director, product marketing, Silicon Realization Group at Cadence. “We are always looking for ways to give customers greater control over the design processes, and TSMC’s introduction of its Library Characterization Reference Kit does just that.”

Shrinking process geometries increase process variations and make creation of accurate noise, power and timing models for foundation IP very complex given smaller time-to-market windows. The combination of TSMC’s Library Characterization Reference Kit and the Cadence Library Characterizer allows customers to speed their overall design schedule.

“Enabling our customers to re-characterize their standard cell library IP not only gives them more control over their schedule, it also gives them more control to address the timing, noise and power of their design,” said Suk Lee, director of Design Infrastructure Marketing at TSMC. “By providing the Library Characterization Reference Kit online, we are giving our customers the tools needed to assure re-characterization that addresses their specific design challenges.”

The Cadence Library Characterizer technology enables re-characterization across process changes and additions to the IP library. It enables ultra-fast and accurate characterization of memory, standard cell libraries and other foundation IP, generating required models for SoC implementation. TSMC has made Cadence Library Characterizer scripts for standard cell libraries available for 40- and 28-nanometer process nodes.

About Cadence
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.
Dean Solov
Cadence Design Systems, Inc.
408-944-7226
dsolov@cadence.com


Cadence and the Cadence logo are registered trademarks of Cadence Design Systems, Inc. in the United States and other countries. All other trademarks are the property of their respective owners.
 
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