Home > Cadence Korea > Course Detail


Allegro PCB SI Foundations v16.5

Back to course catalogue
No dates are currently scheduled. To express interest in this course, contact Cadence Training

Course TitleAllegro PCB SI Foundations v16.5
Course CategorySystem Interconnect Design – Allegro & OrCAD
Duration2 Days
Product Version16.5

Course Description

In this course, you use the Allegro® PCB SI XL software to develop design rules for high-speed designs. You add the resulting physical and electrical constraints to the design through topology templates. These constraints drive the routing of nets on the printed circuit board. You run preroute and postroute signal simulations to analyze the PCB for reflection, simultaneous switching, crosstalk, and other high-speed design factors.

Learning Objectives

After completing this course, you will be able to:


o   Create, extract, and explore topologies

o   Run solution space analysis

o   Create an electrical constraint set

o   Apply constraints to drive placement and routing

o   Run postroute DRC check

o   Use template revision to update the ECSet applied to the nets

o   Analyze the routed board design for signal integrity

o   Create a DesignLink between boards and use it to run multiboard simulation

Software Used in This Course

o   Allegro PCB SI XL

o  Allegro Sigrity PowerSI 

Software Release(s)

o   SPB 16.5

Course Agenda

Note that this course can be tailored to better meet your needscontact the Cadence training staff for specifics.


o   Allegro PCB SI design flow

o   Board setup requirements

o   DC net connections

o   Model assignment

o   Default and discrete models

o   Model integrity

o   IBIS to DML translation

o   Net extraction

o   SigXplorer basics

o   Simulation with SigXplorer

o   Sweep simulations

o   Trace models

o   Constraint floorplanning

o   Constraint DRCs

o   DRC routing

o   Creating a DesignLink

o   System analysis

o   Postroute analysis

o Imoedance and Coupling Checking 

o   Reflection and crosstalk simulation

o   Postroute bus analysis

o   Differential pairs


o   Electrical Engineers

o   PCB Designers


You must have

o   A familiarity with digital and analog circuit design methodology

o   A working knowledge of PCB signal analysis and transmission line theory

케이던스 코리아(유)
경기도 성남시 분당구 판교로 344
엠텍IT타워 9층/2층(교육장)
(구. 삼평동 688-1)
전화번호: 031-728-3111(代)
Regional Offices »