This course introduces you to using the Palladium® XP verification computing platform for accelerating the verification of designs.
Topics covered include
1. Introduction Palladium XP hardware itselt.
2. Introduction Palladium XP Feature.
3. Introduction IXCOM flow.
This course may be tailored to include only topics of interest.
After completing this course, you will be able to:
o Compile, run, and debug designs with ixcom flow in Palladium XP, in the following modes: simulation acceleration, synthesizable testbench acceleration, and in-circuit emulation.
o Understand Palladium XP hardware.
Software Used in This Course
o Unified Xcceleration Emulation (UXE)
o Incisive® Enterprise Simulator
Note that this course can be tailored to better meet your needs – contact the Cadence training staff for specifics.
o Palladium XP hardware
o Palladium XP Feature
o IXCOM flow in Palladium XP
o Demo of Palladum XP
o Verification engineers who intend to use Palladium XP
You must have
o Knowledge of the Verilog® or VHDL languages at a beginning level
o Elementary Unix User Skills
Click here to view course learning maps.