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Cadence
June 2012

Corporate News and Events

In the News
Cadence Announces STMicroelectronics has Taped Out 20-Nanometer Test Chip Using Cadence Tools

Silicon Realization News
(Custom / Analog, Digital IC, Functional Verification, PCB & IC Packaging, Front End Design)

In the News
Digital - Samsung and Cadence Deliver 20nm Digital Design Methodology
PCB & IC Packaging - What's Good About PCB SI PDN Analysis? 16.5 Has Many New Enhancements!
Encounter / Virtuoso - Cadence Encounter and Virtuoso Design Platforms Receive TSMC Certification for 20nm Readiness
AMS - GLOBALFOUNDRIES Silicon Validates 28nm AMS Production Design
Silicon Realization - Sign-off - Cadence Physical Verification System Qualified for TSMC 28nm, 20nm Process

SoC Realization News

In the News
Cadence Expands System and SoC Verification Offerings to Accelerate System Integration and Reduce Time to Market
Cadence Introduces New NVM Express IP Solutions for Solid State Storage Applications
Xilinx Relies on Incisive Enterprise Simulator for Swift IP Design Testing
Nufront's Third-Generation Mobile Applications Processor Powered by Cadence DDR3/3L/LPDDR2 Memory Interface IP Solution
Cadence Announces Updated Design and Verification IP for DDR PHY Interface
TSMC-Cadence Collaboration Helps Clarify 3D-IC Ecosystem

System Realization News

Communities and Blogs
DAC 2012: Connecting Emulation to the Real World of Wireless Interfaces
DAC 2012: Handling a Double Paradigm Shift for Embedded Software Development
DAC 2012 Gary Smith EDA Kickoff: EDA and ESL Growth and Four Different Software Virtual Prototypes
Cadence Virtual System Platform Named as American Technology Award Finalist in Software Category

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