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April 2012
Corporate News and Events

In the News
Cadence India is now on Facebook!
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Cadence India wins EFY Award for Best Employer in EDA category
Cadence Named a Winner of the Prestigious UBM Electronics ACE Awards in the Software Ultimate Products Category
Cadence CEO Lip-Bu Tan Honored with Singapore Award

Silicon Realization News
(Custom / Analog, Digital IC, Functional Verification, PCB & IC Packaging, Front End Design)

In the News
Digital - Cadence Low-Power, Advanced-Node Digital Technology Incorporated Into SMIC 40nm Reference Flow

Communities and Blogs
Mixed Signal - CDNLive! -- Real Number Model Development and Application in Mixed-Signal SoC Verification
Digital - When One Via Just Doesn’t Cut It – Recommended Settings for NanoRoute Including Multi-cut Via Insertion Flows
Digital - User View: Going “Green” With Low-Power Design and Clock Concurrent Optimization (CCOpt)
Custom IC - Things You Didn't Know About Virtuoso: Change is Here to Stay
PCB & IC Packaging - What's Good About Selection Filters in DEHDL? The Secret's in the 16.5 Release!
PCB & IC Packaging - Why Doesn’t My Board Work?
Functional Verification - DVCon 2012: Bringing Continuous Domain into SystemVerilog Covergroups

SoC Realization News

Communities and Blogs
What Needs to Happen for 3D-IC TSV Success
EDA Symposium: How Wide I/O is Driving 3D-ICs with TSVs
EDA Symposium: Users Cite 3D-IC Design Tool Needs

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