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Cadence
March 2012
Corporate News and Events

In the News
Cadence Named Finalist in Four Categories of the Prestigious UBM Electronics ACE Awards

Silicon Realization News
(Custom / Analog, Digital IC, Functional Verification, PCB & IC Packaging, Front End Design)

Communities and Blogs
Custom / Analog - Virtuoso AMS Designer Wins the China ACE Best EDA Product Award
Digital - Five-Minute Tutorial: Default Naming Conventions in Encounter Digital Implementation (EDI) System
Functional Verification - Gentlemen, Start Your Simulation Engines
Mixed Signal - Digital and Analog Verification – Round Peg in a Square Hole?

SoC Realization News

In the News
Design IP - Cadence Expands Proven Ethernet IP Offering with 40/100 Gigabit Ethernet Solution
Design IP - EETimes article by Cadence:"Wide I/O driving 3-D with through-silicon vias"
Design IP - Margin Of Error: Ed Sperling article including Neil Hand interview

Collateral
Design IP - Cadence Design IP for Gigabit Ethernet Technical Brief
Design IP - Cadence Design IP for High-Speed (10/40G) Ethernet Product Brief
Design IP - Cadence Design IP for Ultra High-Speed (40/100G) Ethernet Product Brief

Communities and Blogs
Richard Goering: Who Needs 40/100 Gigabit Ethernet SoCs?
Steve Leibson: Cadence announces synthesizable 40G and 100G Ethernet Controller, PCS, and BEAN (Backplane Ethernet Auto-Negotiation) IP

System Realization News

In the News
HW and SW Platforms - Production Release of Virtual Platform for Xilinx Zynq-7000 EPP Annouced
PCB Design - Allegro Update Video at DesignCon
PCB Design - FPGA-PCB codesign; a 21st Century approach to integrating FPGAs into the PCB design process

Collateral
Verification IP - On-line demos with Real Software at Your Own Pace - share with users

Communities and Blogs
Functional Verification - What's Good About Capture’s Placement Report? Look to SPB16.5 and See!
HW and SW Platforms - The Zynq Virtual Platform: Not Just for Pre-Silicon
HW and SW Platforms - Virtual Divide and Conquer Enables Fixed Sub-Systems
PCB Design - Altera 28 Gbps Stratix V IBIS-AMI Models Now Blazing Channels with Allegro PCB SI
PCB Design - Free Techtorials for Allegro and OrCAD users – PCB Planning, Signal Integrity
PCB Design - IPC-2581 Consortium Chat
PCB Design - What’s Good about OrCAD Apps? Symbol and Footprint Creation Just Got a Lot Easier!

Videos
HW and SW Platforms - Video: Xilinx shares multiple benefits of the Virtual System Platform

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