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November 2011
Silicon Realization News
(Custom / Analog, Digital IC, Functional Verification, PCB & IC Packaging, Front End Design)

Digital - Clock-Concurrent Optimization Reshapes IC Physical Design Flow
IC Packaging/SiP - Cadence Wins TSMC EDA Partner Award for 3D-IC Technology
Mixed Signal - TowerJazz Design Flow qualifies Cadence soln

Custom / Analog - Customers Can See the Latest in Custom/Analog Technologies On-Demand
Digital - Customers Can See the Latest in Digital Technologies On-Demand

Communities and Blogs
PCB Design - What's Good About Refresh, Copy Project, TCL in SCM? 16.5 Has a Few New Enhancements!
PCB Design - What's Good About Single Mode Operation in DEHDL? The Secret's in the 16.5 Release!
Low Power - Cadence Low Power Guru Wins Si2’s Distinguished Service Award
Mixed Signal - Fred Discovers 1000x-10000x Speedup Using wreal Models
Mixed Signal - How Fred Discovered Mixed-Signal Behavioral Modeling

SoC Realization News

SoC Realization - Make Vs. Buy
SoC Realization - Memory Challenges In The Extreme

System Realization News

Emulation/Acceleration - Yahoo News: Cadence Palladium XP Enables QLogic to Rapidly Develop Sophisticated Network Switch

Communities and Blogs
TLM-Driven Design and Verification - EEE Revises SystemC for 2011 – What’s In It For Users

HW and SW Platforms - Awesome video showing VSP with the Xilinx® Zynq™-7000 Extensible Processing Platform
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