Cadence India eNewsletter
Startup Acceleration
Successful entrance into today’s fiercely competitive silicon industry hinges on collaboration among investors, entrepreneurs, and key partners. More»
Trainings & Workshops
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Digital IC
Logic Equivalence Checking with Encounter Conformal: Basic & Advanced: Version 7.1
Dec 10, 2008 - Dec 11, 2008
Cadence, Bangalore
Custom IC
Advance Spectre; Version 6.2
Dec 15, 2008 - Dec 16, 2008
Cadence, Bangalore
Silicon Package Board
Allegro PCB Power Integrity; Version 15.7
December 12, 2008
Cadence, Bangalore
Specman Elite Advance Course
Dec 10, 2008 - Dec 12, 2008
Cadence, Bangalore
Basic SystemVerilog Language
Dec 15, 2008 - Dec 16, 2008
Cadence, Bangalore
December 2008 
  Encounter Digital IC Platform News
Cadence Gives Digital Implementation a Major Speed Boost
Cadence has accelerated digital IC design with the introduction of the new Cadence Encounter Digital Implementation System More»
Cadence Announces Encounter Digital Implementation System with EDA Industry First End-to-End Parallel Processing Flow
Ultra Scalable RTL-to-GDSII System Marks New Era of Productivity for Design Closure and Signoff Analysis in Advanced Low-Power and Mixed-Signal Designs More»
LSI Joins Power Forward Initiative
Common Power Format-enabled Low-Power Design Solutions to Enable Power-Efficient Electronics More»
  Virtuoso Custom IC Platform News
Cadence Unveils Next-Generation Parallel Circuit Simulator for the Verification of Complex Analog and Mixed-Signal IC Designs
Virtuoso Accelerated Parallel Simulator Delivers Exceptional Performance for Most Challenging Circuit Simulation Tasks, with Full Spectre Accuracy More»
Library Variability Analysis using Cadence Litho Electrical Analyzer (LEA)
Brajesh Heda, Lead App. Engineer, Cadence Design Systems, India. More»
  Incisive Verification Platform News
Cadence Announces Development of OVM Verification IP for USB 3.0 and PCI Express 3.0 High-Speed Protocols
New Products Strengthen Cadence VIP Leadership by Extending Industry’s Broadest Portfolio with Key Emerging Protocols More»
When Green Chips Turn Brown
By Jeffrey Flieder on November 20, 2008 More»
  Allegro SPB Platform News
Cadence Launches ActiveParts Portal and Brings New Productivity-Boosting Technology to Latest OrCAD Release
Portal Provides PCB Design Teams Access to SupplyFrame for Component Information While New Technology Boosts Productivity  More»
What’s Good About Advanced Plating Bar Checks - Check out the SPB16.2 Release and See!
By Gerald "Jerry" Grzenia on November 19, 2008 More»
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