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Encounter Digital IC Platform News |
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Cadence Gives Digital Implementation a Major Speed Boost |
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Cadence has accelerated digital IC design with the introduction of the new Cadence Encounter Digital Implementation System More» |
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Cadence Announces Encounter Digital Implementation System with EDA Industry First End-to-End Parallel Processing Flow |
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Ultra Scalable RTL-to-GDSII System Marks New Era of Productivity for Design Closure and Signoff Analysis in Advanced Low-Power and Mixed-Signal Designs More» |
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LSI Joins Power Forward Initiative |
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Common Power Format-enabled Low-Power Design Solutions to Enable Power-Efficient Electronics More» |
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Virtuoso Custom IC Platform News |
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Cadence Unveils Next-Generation Parallel Circuit Simulator for the Verification of Complex Analog and Mixed-Signal IC Designs |
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Virtuoso Accelerated Parallel Simulator Delivers Exceptional Performance for Most Challenging Circuit Simulation Tasks, with Full Spectre Accuracy More» |
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Library Variability Analysis using Cadence Litho
Electrical Analyzer (LEA) |
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Brajesh Heda, Lead App. Engineer, Cadence Design Systems, India. More» |
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Incisive Verification Platform News |
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Cadence Announces Development of OVM Verification IP for USB 3.0 and PCI Express 3.0 High-Speed Protocols |
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New Products Strengthen Cadence VIP Leadership by Extending Industry’s Broadest Portfolio with Key Emerging Protocols More» |
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When Green Chips Turn Brown |
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By Jeffrey Flieder on November 20, 2008 More» |
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Allegro SPB Platform News |
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Cadence Launches ActiveParts Portal and Brings New Productivity-Boosting Technology to Latest OrCAD Release |
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Portal Provides PCB Design Teams Access to SupplyFrame for Component Information While New Technology Boosts Productivity More» |
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What’s Good About Advanced Plating Bar Checks - Check out the SPB16.2 Release and See! |
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By Gerald "Jerry" Grzenia on November 19, 2008 More» |
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