Cadence India eNewsletter
Cadence Introduces SaaS Solutions for Semiconductor Design
Hosted Design Solutions Provide Faster and More Efficient Time-to-Productivity More»
Trainings & Workshops
More Information»
Digital IC
SOC Encounter
Sep 17, 2008 - Sep 19, 2008
Cadence, Bangalore
Encounter RTL Compiler;
Version 7.1

Oct 30, 2008
Cadence, Bangalore
Custom IC
Virtuoso XL Layout Editor;
Version 5.1.41

Oct 13, 2008 - Oct 15, 2008
Cadence, Bangalore
SKILL Language Programming;
Version 5.1.41

Nov 11, 2008 - Nov 14, 2008
Cadence, Bangalore
Silicon Package Board
Allegro Package Designer;
Version 16.0

Sep 25, 2008 - Sep 26, 2008
Cadence, Bangalore
Allegro PCB Editor Advanced Techniques; Version 15.7
Oct 24, 2008 - Oct 25, 2008
Cadence, Bangalore
Specman Elite Basics for Verification Environment Users
Sep 22, 2008 - Sep 24, 2008
Cadence, Bangalore
Assertion-based verification
using SVA in the Incisive formal verifier

Sep 30 - October 1, 2008
Cadence, Bangalore
September 2008 
Wipro Technologies Joins Power Forward Initiative
CPF-enabled Low-Power Design Solution to Enable Energy Efficient Electronics More»
Registration for CDNLive India 2008 is open now! Register now!
  Cadence Encounter Digital IC Platform News Platform
SandLinks Achieves First-Time Right Silicon Using CPF-Enabled Cadence Low-Power Solution
Design Flow Helps Developer of Next Generation Active-RFID Networks Achieve Longer Battery Life for Active RFID Tags More»
  Cadence Virtuoso Custom IC Platform News
Cosmic Circuits Experiences 8X Performance Gains by Adopting Cadence Virtuoso Spectre with Turbo Technology
With the increased level of complexity of today’s ICs and the pressure to hit market windows, accuracy and runtimes are of paramount importance. More»
Netlist Based IR Drop and Electromigration Analysis Flow in Virtuoso® UltraSim®
With CMOS process technology scaling down to 65nm and below, IR-drop and electromigration (EM) effects become significant design considerations in the arena of VLSI Design.  More»
  Cadence Incisive Verification Platform News
Cadence Expands Enterprise Verification Solution to Include Planning, Unified Verification Metrics and Industry Databases
New Capabilities Shorten Development Cycle Using Microsoft Word® with Standard SQL Databases to Accelerate Metric-Driven Verification More»
OVM - The Methodology for Enabling an Industry-wide VIP Eco-System
By Michael Stellfox on August 13, 2008 More»
  Cadence Allegro SPB Platform News
Cadence Introduces Constraint-Driven High-Density-Interconnect Design Flow for PCB
Broad Array of New Features Eases Challenges of Today's PCB Designers More»
New Cadence Design Technology Tackles Miniaturization, Product Design and Low-Power Challenges for IC Package/SiP Designers
New SPB 16.2 Capabilities Can Help Reduce Package Size, Design Time More»
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