Cadence Design Systems, Inc.

Technical Info

This page contains technical information related to engineering services, including application notes, white papers, and articles.

Technical papers

	Empowering Design for Quality of Silicon—Encounter low-power design flow

White papers

	Design and Development of the First Single-Chip Full-Duplex OC48 Traffic Manager and ATM SAR SoC

	A 62.5Gb/s Multi-Standard SerDes IC

	CMOS RFIC Architectures for IEEE 802.15.4 Networks

	Improved Mitchell-based Logarithmic Multiplier for Low-power DSP Applications

	An 852 x 600 Pixel OLED-on-Silicon Color Microdisplay Using CMOS Subthreshold-Voltage-Scaling Curent Drivers

more white papers

Articles

06/26/06	Cadence mainstreams RF SiP design

06/26/06	Cadence tackles SiP, verification issues

09/12/05	Cadence Goes for Kits

04/26/05	Endpoint controller certified for PCI Express

04/25/05	Cadence PCI Express Passes PCI-SIG Compliance Testing

more articles

Cadence feature stories

08/13/04	Cadence and Rambus to deliver high-speed serial link solutions

07/02/04	PCI Express Vertical Solution: Best-in-class products address every stage of development