Engineering Services
Functional verification
Digital IC design
Custom IC design
Silicon-package-board co-design
PCI Express vertical solution
Vertical Solution for Ethenet
Low-power design services
PowerPC design services
Silicon engineering
European start-up accelerator program
Working with us
Print-friendly version

Low-power design services

Whether developing a next-generation GPS system, an ENERGY STAR-compliant graphics card, or a blade server, Cadence® Engineering Services understands the importance of creating power-efficient designs. Across our broad customer base, we see increasing demand in every market segment for products with more functionality, longer battery life, lower-cost packaging, and greater reliability. Meeting these rapidly changing requirements, however, means incorporating advanced low-power design techniques that may introduce risk and adversely affect a team's design flow and methodology.

Cadence Engineering Services has the know-how and the solutions to help companies overcome these challenges. Our expertise in low-power design covers the entire spectrum, from systems and architecture design through RTL design, synthesis, verification, and physical implementation. Early architectural tradeoffs lead to significant power savings. Our digital front-end design capabilities and extensive system-level experience help engineers make the critical architectural choices to successfully implement a power-efficient design.

Whether the challenge is meeting an industry-based standard in an advanced low-voltage process or defining the functionality and control of both digital and analog macros in various modes (standby, sleep, power down), Cadence Engineering Services has a solution tailored to your specific needs. Proficient in low-power synthesis, silicon implementation, power analysis, and both static and dynamic power issues, our design teams work side by side with you to optimize power throughout the entire design. By leveraging our track record of success using both standard and advanced techniques (clock gating, multi-Vt optimization, power shut-off, multi-supply voltage, substrate biasing, dynamic voltage, frequency scaling), companies can reach their low-power IC design goals without sacrificing performance.

What's new

RFco, Inc.—silicon success video
Hear how Cadence services shortened silicon design cycle by three months

Resource library
 

Overview brochure
IP catalog
Technical info
Success stories
News and events
User community

Products and support
 

Education services
SourceLink

Request Information