Home > DAC 2014 > Cadence Theater

Learn from Cadence Customers and Partners

As with previous years, the Cadence® Theater at DAC was a lively and popular place to learn, directly from our customers and partners, how to apply our technologies to real-world problems.

Companies that presented in the Cadence Theater included: AMD, ARM, Altera, Broadcom, Cisco, CSR, Fujitsu, GLOBALFOUNDRIES, National Instruments, Qualcomm, Samsung, Solarflare, TSMC, Tektronix, TowerJazz, and Xilinx.
Monday, June 02, 2014
Session Time Company Presentation Title
Watch presentation 09:30 AM STMicroelectronics Cadence In-Design VIPVS and LDE Adoption in STM Smart Power PDK
Watch presentation 10:00 AM ARM High-Efficiency Cortex-A53 Implementation Solution for Networking
Watch presentation 11:00 AM GLOBALFOUNDRIES Collaboration Key to Enablement at Advanced Nodes
Watch presentation 11:30 AM Cadence Physically Aware RTL Synthesis
Watch presentation 12:00 PM TowerJazz Using Cadence PVS for Signoff at TowerJazz
Watch presentation 12:30 PM National Instruments Post- and Pre-Silicon Verification – The Best of Both Worlds
Watch presentation 01:00 PM Samsung Foundry DFM Requirements with Cadence In-Design, Signoff DFM
Watch presentation 01:30 PM NVIDIA Palladium for Android SW Validation, GPU Testing on ARM v8 SoC
Watch presentation 02:30 PM NetSpeed NetSpeed Systems: Bringing the Power of Synthesis to SoC Design
Watch presentation 03:00 PM Xilinx Industry-Leading Solutions for FPGA-Based Prototyping
Watch presentation 04:00 PM AMD Application-Level Power Event Monitoring with Hybrid Emulation
Watch presentation 05:00 PM Broadcom SoC Static Power Verification with Encounter Conformal Low Power
Watch presentation 05:30 PM Maxlinear Tempus Timing Signoff Solution: Impressions, Real-World Results

Tuesday, June 03, 2014
Session Time Company Presentation Title
Watch presentation 10:00 AM TowerJazz Analog/MS Flow with EAD, Device Checker, and PVS PERC Features
Watch presentation 10:30 AM Samsung 14nm FinFET Design Using Virtuoso Advanced Features
Watch presentation 11:00 AM IBM Overcoming Patterning-Induced Place-and-Route Challenges at 10nm
Watch presentation 12:00 PM ARM and Cadence ARM CoreLink 400 Interconnect IP and Cadence Interconnect Workbench
Watch presentation 12:30 PM Methodics IP and Design Data Management for SoC Designs
Watch presentation 01:00 PM Solarflare Emulating a Dual-Port 10G/40G NIC on Palladium and RPP
Watch presentation 02:00 PM ARM Accelerating Graphics Software Simulation in Virtual Platforms
Watch presentation 03:00 PM Cadence Validate Complex Multi-Core Designs, Optimize HW/SW Performance
Watch presentation 03:30 PM Fujitsu Physical RTL Synthesis Improves Timing and Congestion at Fujitsu
Watch presentation 04:00 PM STMicroelectronics Virtuoso Mixed-Signal "SmartPower" Implementation Flow
Watch presentation 04:30 PM Tektronix System Signal Integrity Expands into the Lab
Watch presentation 05:00 PM ARM Premium Mobile ARM-Cortex A57 Low-Power Implementation Solution

Wednesday, June 04, 2014
Session Time Company Presentation Title
Watch presentation 09:30 AM Methods2Business SystemC-Based Design for Next Generation of Wi-Fi 802.11n MAC IP
Watch presentation 10:00 AM Kozio Applying Post-Silicon Verification Approaches at Pre-Silicon
Watch presentation 10:30 AM Altera Flip-Chip Co-Design Planning Using Cadence OrbitIO
Watch presentation 11:00 AM Cadence Accelerated VIP, a Deep Dive Based on Customer Case Studies
Watch presentation 11:30 AM Samsung Enabling Cadence Signoff Technologies for 14nm FinFET at Samsung
Watch presentation 12:00 PM Dini Group Hardware Solutions for FPGA-Based Prototyping
Watch presentation 01:00 PM GLOBALFOUNDRIES Old and New DFM Paradigms Transitioning from 20/14 to 10nm
Watch presentation 01:30 PM CSR Using Palladium/VSP Hybrid to Accelerate SW Development
Watch presentation 02:30 PM Cisco Physical RTL Synthesis Strategies on Networking ASICs at Cisco
Watch presentation 03:00 PM X-FAB Enhanced Black Box Design Flow Using Cadence PVS
Watch presentation 03:30 PM Cadence Academic Network DAC – PhD Forum Award Ceremony
Watch presentation 04:00 PM Bluespec FPGA Prototyping Enables Rapid Development of Customizable Processors
Watch presentation 04:30 PM TowerJazz Using Cadence PVS for Signoff at TowerJazz
Monday, June 02, 2014
Time Company Presentation Title
09:30 AM STMicroelectronics Cadence In-Design Virtuoso IPVS and LDE Adoption in STM Smart Power PDK
10:00 AM ARM High-Efficiency Cortex-A53 Implementation Solution for Networking
10:30 AM TSMC 16nm FinFET Certification
11:00 AM Bose Giveaway
11:00 AM GLOBALFOUNDRIES Collaboration Key to Enablement at Advanced Nodes
11:30 AM
12:00 PM Kindle Giveaway
12:00 PM TowerJazz Using Cadence PVS for Signoff at TowerJazz
12:30 PM National Instruments Post- and Pre-Silicon Verification – The Best of Both Worlds
01:00 PM GoPro Hero3 Giveaway
01:00 PM Samsung Foundry DFM Requirements with Cadence In-Design, Signoff DFM
01:30 PM NVIDIA Palladium for Android SW Validation, GPU Testing on ARM v8 SoC
02:00 PM Kindle Giveaway
02:00 PM Broadcom Optimized Layout-Aware Scan with Third-Party DFT
02:30 PM NetSpeed NetSpeed Systems: Bringing the Power of Synthesis to SoC Design
03:00 PM Kindle Giveaway
03:00 PM Xilinx Industry-Leading Solutions for FPGA-Based Prototyping
03:30 PM Marvell Fast and Accurate Extraction for Advanced Nodes
04:00 PM GoPro Hero3 Giveaway
04:00 PM AMD Application-Level Power Event Monitoring with Hybrid Emulation
04:30 PM TSMC Managing Manufacturing Effects on TSMC's 16nm FinFET Process
05:00 PM Kindle Giveaway
05:00 PM Broadcom SoC Static Power Verification with Encounter Conformal Low Power
05:00 PM Bose Giveaway

Tuesday, June 03, 2014
Time Company Presentation Title
09:30 AM Juniper Incremental Elaboration in the Verification Flow
10:00 AM TowerJazz Analog/MS Flow with EAD, Device Checker, and PVS PERC Features
10:30 AM Samsung 14nm FinFET Design Using Virtuoso Advanced Features
11:00 AM Bose Giveaway
11:00 AM IBM Overcoming Patterning-Induced Place-and-Route Challenges at 10nm
11:30 AM CoFluent Top-Down Design Methodology with CoFluent Studio and HLS
12:00 PM Kindle Giveaway
12:00 PM ARM and Cadence ARM v8 Mobile SoC Performance Analysis and Verification
12:30 PM Methodics IP and Design Data Management for SoC Designs
01:00 PM GoPro Hero3 Giveaway
01:00 PM Solarflare Emulating a Dual-Port 10G/40G NIC on Palladium and RPP
01:30 PM TSMC IP Portfolio and Quality
02:00 PM Kindle Giveaway
02:00 PM ARM Accelerating Graphics Software Simulation in Virtual Platforms
02:30 PM GLOBALFOUNDRIES GLOBALFOUNDRIES-Cadence Collaboration to Deliver 28nm Solutions
03:00 PM Kindle Giveaway
03:00 PM Samsung and Cadence Validate Complex Multi-Core Designs, Optimize HW/SW Performance
03:30 PM Fujitsu Physical RTL Synthesis Improves Timing and Congestion at Fujitsu
04:00 PM GoPro Hero3 Giveaway
04:00 PM STMicroelectronics Virtuoso Mixed-Signal "SmartPower" Implementation Flow
04:30 PM Tektronix System Signal Integrity Expands into the Lab
04:30 PM Kindle Giveaway
05:00 PM ARM Premium Mobile ARM-Cortex A57 Low-Power Implementation Solution
06:00 PM Bose Giveaway

Wednesday, June 04, 2014
Time Company Presentation Title
09:30 AM Methods2Business SystemC-Based Design for Next Generation of Wi-Fi 802.11n MAC IP
10:00 AM Kozio Applying Post-Silicon Verification Approaches at Pre-Silicon
10:30 AM Altera Flip-Chip Co-Design Planning Using Cadence OrbitIO
11:00 AM Bose Giveaway
11:00 AM Cadence with AMD, Broadcom & nVidia Accelerated VIP, a Deep Dive Based on Customer Case Studies
11:30 AM Samsung Enabling Cadence Signoff Technologies for 14nm FinFET at Samsung
12:00 PM Kindle Giveaway
12:00 PM Dini Group Hardware Solutions for FPGA-Based Prototyping
12:30 PM Qualcomm SoC Implementation Experience Using RC-Physical, Conformal ECO, CCOPT
01:00 PM GoPro Hero3 Giveaway
01:00 PM GLOBALFOUNDRIES Old and New DFM Paradigms Transitioning from 20/14 to 10nm
01:30 PM CSR Using Palladium/VSP Hybrid to Accelerate SW Development
02:00 PM Kindle Giveaway
02:00 PM TSMC Custom/Mixed-Signal N16FF Flow
02:30 PM Cisco Physical RTL Synthesis Strategies on Networking ASICs at Cisco
03:00 PM Kindle Giveaway
03:00 PM X-FAB Enhanced Black Box Design Flow Using Cadence PVS
03:30 PM Cadence Academic Network DAC – PhD Forum Award Ceremony
04:00 PM GoPro Hero3 Giveaway
04:00 PM Bluespec FPGA Prototyping Enables Rapid Development of Customizable Processors
04:30 PM TBD
05:00 PM Kindle Giveaway
05:00 PM TBD
06:00 PM Bose Giveaway