Come hear the latest from Cadence on EDA360 and The Way Forward for Electronic Design. Cadence and its ecosystem partners will present a variety of live presentations featuring real-world solutions that enable customers to deliver innovative products with an eye on both productivity and profitability. You’ll see the latest advances in digital design and implementation, custom/analog design, metric-driven verification, mixed-signal and low-power design, packaging and board solutions, and systems development. You’ll also learn more about the recently announced Open Integration Platform and how the entire Cadence IP portfolio enables Silicon, SoC, and System Realization for the electronics industry.
Booth 1334 – Hall B
Online registration is now closed. Onsite registration in the Cadence booth opens Monday, June 14 at 9 AM.
More than 100,000 chip estimations worldwide have been performed by designers, architects, and managers who rely on the ChipEstimate.com chip planning portal. All within this one site, users can explore an extensive catalog of semiconductor IP and download the InCyte Chip Estimator tool to predict die size, power, leakage, performance, and cost to realize their next chip design.
Booth 521 – Hall C
At the ChipEstimate.com exhibit, you’ll learn about the latest in semiconductor IP from dozens of IP suppliers on the IP Talks! stage. Join us for hands-on demonstrations of IP exploration and chip estimation, and discover how to estimate your next chip's size, power, and cost—in mere seconds. To see a schedule of participating IP partners, visit IP Talks!
ChipEstimate.com will also be present in the GLOBALFOUNDRIES booth # 275 and will feature solutions from GLOBALFOUNDRIES and reinforce the commitment to providing a total, flexible solution for foundry customers.
Cadence and GLOBALFOUNDRIES
Cadence and GLOBALFOUNDRIES are demonstrating their collaboration at DAC this year. Come see Vice President Subramani Kengeri from GLOBALFOUNDRIES give his perspective in our Silicon Realization luncheon. Learn about Cadence and GLOBALFOUNDRIES collaboration around mixed-signal, PDK, DFM, and Open Integration Platform. Additionally, don’t miss Cadence in the GLOBALFOUNDRIES booth # 275 where we will be expanding on two capabilities of the EDA360 vision, Silicon Realization, and SoC Realization.
Booth 275 – Hall C
The Universal Verification Methodology (UVM) standard was just recently announced by Accellera. Come hear the latest on the UVM and its foundation, the Open Verification Methodology (OVM). These methodologies offer open and interoperable verification solutions, guaranteed to run on multiple leading simulators and support multiple languages. The OVM and the UVM facilitate easier verification reuse and the development and usage of plug-and-play verification IP. Stop by booth #1350 to hear more.
Booth 1350 – Hall B
More information about UVM: www.uvmworld.org
More information about OVM: www.ovmworld.org
Cadence and TSMC: Partnering to Enable Design Success for More Than 20 Years
Cadence and TSMC have collaborated for more than two decades to maximize quality of results for power, performance, and manufacturability and to meet time-to-volume requirements. Come and hear about TSMC Reference Flow 11, which offers unique capabilities for Cadence C-to-Silicon Compiler, 3D IC design, and DFM with a golden embedded engine for advanced SoC implementation. You’ll also learn about an Integrated Signoff Flow for 65nm, RF Reference Kit, and Analog/Mixed-Signal Reference Flow recently released by TSMC and Cadence that deliver predictable, high-quality, and production-proven flows for mixed-signal SoC design.
Booth 294 – Hall C
Cadence and IBM
The rising complexity of today’s electronics systems are requiring very tight coordination between the processes used by software and hardware engineers as they bring integrated products to market. IBM Rational and its suite of solutions have traditionally focused on software developers, but are being applied successfully to hardware development as well. IBM Rational is addressing the needs of complex electronics development in several ways, including: requirements engineering to manage hardware and software requirements and their inter-related relationships; upfront system modeling to determine which aspects of the design will be implemented in hardware versus software; and common defect tracking for both hardware and software development. The IBM booth will demonstrate these capabilities through an updated live demo of the Enterprise Verification Management Solution featuring Cadence Incisive functional verification solutions.
Booth 1305 – Hall B
Cadence Design Systems will demonstrate solutions using a number of widely-deployed Si2 standards: OpenAccess, Common Power Format (CPF), Open PDK, and effective current source modeling (ECSM). Hear from experts how you can use these industry-leading solutions from Cadence to address your most challenging advanced-node design problems.
Booth 502 – Hall C
Open SystemC Initiative – Cadence Gold Sponsor
For more information: media.systemc.org
Check out the new media site from the Open SystemC Initiative (OSCI) featuring technical user videos and presentations on the latest advancements in flexible and sustainable solutions for system-level design including transaction-level modeling (TLM), SystemC AMS, synthesis, and more. New videos include a keynote from Gary Smith at SystemC Day 2010. Videos are free to industry professionals.
Cadence and Dassault
Visit the Dassault Systems booth #1370 to see their data management tool Enovia DesignSync working in conjunction with the Cadence Virtuoso custom design platform. The combined tool provides mutual customers with sophisticated version control features to provide complete design management from start to finish.
Booth 1370 – Hall B
Cadence and IC Manage
Visit IC Manage Booth #550 to view and discuss the advanced design data management capabilities of the IC Manage Global Design Platform within the Cadence Virtuoso custom design platform familiar user interface, including configurable workflows, derivative management, and design data hand-offs such as property file auto-check-in/check-out and revision history. Joint customers can improve team collaboration and designer productivity, while having access to built-in IT capabilities and 24x7 enterprise availability.
Booth 550 – Hall C
| Silicon Realization Lunch Panel
Hosted by Cadence on
Tuesday, June 15.
| Demo Suites
Sign up for demos and choose from a variety of live product presentations.
| EDA360 Idol at the Denali Party
Monday June 14 at the
House of Blues.
| Sponsored by Cadence
Cadence is a Platinum exhibitor and is sponsoring Management Day on Tuesday, June 15.
ChipEstimate.com IP Talks!
Visit us at the ChipEstimate.com booth #521.
EDA360 – The Way Forward for Electronic Design
Download the Vision Paper.