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mixed-signal

  • Q&A Interview: Charlie Giorgetti Outlines Cadence Product Solutions

    Charlie Giorgetti is corporate vice president of solutions and product marketing at Cadence. In this interview, he discusses Cadence’s product strategy, and outlines five “solutions” that are the current focus of Cadence’s marketing efforts. These solutions will be highlighted...
    Posted to Industry Insights (Weblog) by rgoering on Thu, Jul 23 2009
  • Simulation of Voltage Scaling for Dynamic Power Reduction

    Some background info: In a previous blog , I introduced: DVFS (Dynamic Voltage and Frequency Scaling), a technique used for Dynamic Power Reduction. RVM (Real Valued Modeling) for efficient simulation of mixed signal SoC with very high speed and efficiency using Cadence DMS (Digital Mixed Signal) offerings...
    Posted to Functional Verification (Weblog) by Neyaz on Wed, Jul 22 2009
  • DesignCon 2010 Call for Papers

    Hello, As a member of the technical committee and as the chair member for the Analog and Mixed-Signal Design and Verification track, I would like to invite you to submit an abstract to this conference. We solicit papers for two types of sessions: technical papers and tutorials. Technical papers, which...
    Posted to Custom IC Design (Weblog) by helenet on Mon, Jul 20 2009
  • Using wreals to Simulate Frequency Scaling for Dynamic Power Reduction

    Some background info: Taking a quick look at Power dissipation in CMOS: Leakage power is well managed by powering down parts of the design when not in use. This is a well understood problem and can be simulated well in IUS (Incisive Unified Simulator) using CPF (Common Power Format) commands to capture...
    Posted to Functional Verification (Weblog) by Neyaz on Wed, Jul 15 2009
  • Guest Blog: The RF Challenge In Portable Designs

    The need for RF integration in consumer electronics presents some tough challenges, says veteran electronics industry editor John Donovan. He notes several emerging approaches that might help ease the challenge. In simpler times most designs were digital. Add a few converters to handle I/O and you could...
    Posted to Industry Insights (Weblog) by rgoering on Mon, Jul 13 2009
  • DAC Ecosystem Booth Panels Bring Out User Voice

    At previous Design Automation Conferences, I’ve always been most interested in what EDA users have to say. One way to hear about the user experience at this year’s DAC is to attend any of five panels at the Cadence Ecosystem Partners booth (#4200, North Hall). These panels will include representatives...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Jul 1 2009
  • Q&A Interview: Chi-Ping Hsu Describes 5 Cadence Initiatives

    Chi-Ping Hsu is senior vice president of research and development for the Cadence Implementation Products Group. He is responsible for analog design and verification, digital implementation and signoff, mixed-signal design and implementation, physical verification, DFM, and PCB and package design. In...
    Posted to Industry Insights (Weblog) by rgoering on Thu, Jun 25 2009
  • Cadence: Committed to DFM

    On June 10, Cadence issued a press release that mentioned “…decreasing the level of investment in the manufacturing side of DFM” as part of restructuring activities. Since that announcement, some in the press and analyst community have published their interpretations of the actions...
    Posted to Digital Implementation (Weblog) by mchacko on Fri, Jun 19 2009
  • Analog Is Back – But Not Like You Think

    After taking a back seat to digital design for many years, analog is re-emerging as a key differentiator and competitive edge for IC vendors. But analog design today is very different from that of 20 years ago, and realizing that is critical for success. In a recent EE Times column , Planet Analog editor...
    Posted to Industry Insights (Weblog) by rgoering on Thu, Jun 18 2009
  • 45 nm Is Turning Point For Model-Based DFM

    A recent decision by TSMC to require model-based design for manufacturability (DFM) checks at 45/40 nm may push DFM into more widespread use. It’s coming too late for the several dozen DFM startups that were around a few years ago, but it could have a significant impact on IC design flows going...
    Posted to Industry Insights (Weblog) by rgoering on Thu, Jun 4 2009
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