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analog,mixed-signal

Learn How to Do Mixed-Signal Design at CDNLive! Silicon Valley

With the theme of Connect, Share and Inspire, this year's CDNLive! Silicon Valley March 13-14, 2012 will be an exciting forum for Cadence customers to share their most recent chip design successes and learn from each other. Among close to 100 presentations during the packed two day agenda, one area...

Posted to Mixed-Signal Design (Weblog) by QiWang on Wed, Mar 7 2012
Q&A: Adam Traidman Updates Silicon IP Trends and ChipEstimate.com

As president and CEO of Chip Estimate before its 2008 acquisition by Cadence, Adam Traidman has been a front-row observer of the silicon IP business for many years. His company developed the InCyte chip planning tool, which includes an IP database to help designers predict area and performance. Today...

Posted to Industry Insights (Weblog) by rgoering on Thu, Feb 23 2012
Panelists: Bridging the Gap Between Analog and Digital Design

Analog and digital designers have lived in separate worlds for a long, long time. They use different methodologies and tools, and while digital design is heavily automated, analog design is not. But mixed-signal integration will force this gap to narrow, opening the door to new methodologies and better...

Posted to Industry Insights (Weblog) by rgoering on Wed, Feb 1 2012
Webinar Report: Power-Aware Mixed-Signal Verification

Most of the discussion about low-power design techniques has focused on digital circuits. However, nearly all systems-on-chip (SoCs) are mixed-signal, and the way in which analog and digital circuitry interact has a huge impact on overall power consumption. Thus, low power (or "power aware"...

Posted to Industry Insights (Weblog) by rgoering on Wed, Jan 25 2012
Webinar Report – New Approaches to Mixed-Signal Verification and Assertions

Nearly all systems-on-chip (SoCs) are mixed-signal, and as complexity grows, new verification techniques are needed. No longer is it sufficient to use traditional analog and digital simulation in isolation - instead, information must flow freely between analog and digital domains to allow a true mixed...

Posted to Industry Insights (Weblog) by rgoering on Thu, Jan 19 2012
Webinar Report: Solving Mixed-Signal Power Grid Challenges

Complex analog/mixed-signal ICs pose many power grid design and analysis challenges. Unanticipated IR drop and electromigration problems are commonplace, and they significantly impact circuit behavior. But as a recently archived webinar shows, there are a number of ways to minimize these problems, even...

Posted to Industry Insights (Weblog) by rgoering on Wed, Jan 11 2012
All Things Analog – Video Interviews with Experts

John Pierce, product marketing director at Cadence, recently sat down with several analog/mixed-signal design and verification experts for "All Things Analog" video interviews. These short (8-11 minute) video clips offer some good insights into analog verification and simulation, PLL design...

Posted to Industry Insights (Weblog) by rgoering on Wed, Jan 4 2012
Fred Discovers 1000x-10000x Speedup Using wreal Models

This is the second installment in an ongoing series of blog posts that includes an email conversation between Fred and Harry, two fictional mixed-signal engineers, about analog behiavoral modeling. You can read the first installment by clicking here . (NOTE: This blog post was written by Walter Hartong...

Posted to Mixed-Signal Design (Weblog) by Paul Foster on Tue, Nov 1 2011
How Fred Discovered Mixed-Signal Behavioral Modeling

Introduction This is the first of a series of blogs where we will add pieces to the story over time. This is an email conversation between Fred and Harry, two fictional mixed-signal designers, where Fred is adopting various modeling techniques to realize faster simulations while maintaining acceptable...

Posted to Mixed-Signal Design (Weblog) by Paul Foster on Mon, Oct 31 2011
Webinar: Bringing Digital Verification Methodologies to Mixed-Signal SoCs

It's fairly straightforward (albeit slow) to verify an analog IP block using a Spice simulator. But when that block goes into a mixed-signal system-on-chip (SoC), and the time comes for chip-level verification, a different approach is needed. A recently archived Cadence webinar shows how advanced...

Posted to Industry Insights (Weblog) by rgoering on Wed, Sep 28 2011

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analog,mixed-signal