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Cadence Technology Forums
Forum NameTopicsRepliesLast Post
    Hardware/Software Co-Development, Verification and IntegrationModerator: Frank Schirrmeister230505Re: PSpice magnetics.lib
By: Mescheltana
09 Jul 2014 07:56 AM
    Functional VerificationModerator: Adam Sherer11993800increase virtual memory to sn_ ...
By: amirb
10 Jul 2014 08:02 AM
    Functional Verification Shared CodeUpload your code here. Please give a brief summary of how to use it. 56152Re: Shell Script rc
By: MStarilov
03 Jul 2014 07:25 AM
    Logic Design Synthesis, Equivalence Checking, Low Power Validation, Test
Moderator: Diego Hammerschlag, Vince Pham, Lisa
5441549Re: LEC - Conformal RTL to net ...
By: grasshopper
08 Jul 2014 06:53 AM
    Digital ImplementationDesign Planning, Place-and-Route, Low Power Implementation, Signoff
Moderator: Bob, Kari, Vince Pham
16905307Re: Special routes with opens
By: wally1
09 Jul 2014 08:07 AM
    Custom IC DesignModerator: Andrew Beckett.308612549Abstract Generator : 2 layouts ...
By: samung
10 Jul 2014 09:23 AM
    Custom IC SKILLModerator: Andrew Beckett.236210656Re: Error getting while using ...
By: Andrew Beckett
10 Jul 2014 07:16 AM
    RF DesignModerator: Andrew Beckett.4691901Re: Increase the number of poi ...
By: Clidre
07 Jul 2014 11:57 AM
    PCB DesignFrom schematic to autorouting what are your challenges in producing high-speed designs?586721503Modelling a non-linear load
By: nicksantos13
10 Jul 2014 08:38 AM
    PCB SKILLUpload your SKILL files here. Give a brief summary of how to best use the SKILL code.10664381Using Skill to create a Padsta ...
By: thewill2live
09 Jul 2014 02:08 PM
    IC Packaging and SiP DesignPackaging solutions can make or break the cost budget. What design issues are you facing today? 105274Re: Unable to delete a cavity
By: aCraig
10 Jul 2014 09:41 AM
    High Level SynthesisModerator: Rajesh Radhakrishnan614Re: Unable to map design witho ...
By: JustV
05 Jun 2014 09:25 AM
    Mixed-Signal DesignThis Forum is in place to cover and discuss cross functional topics you may encounter designing and layout a Mixed-Signal Design.
Moderator: Andreas Lenz
93301mixed signal simulation
09 Jul 2014 04:08 AM
    RAVEL DRC Programming for IC Packaging and PCBEverything related to ICP & PCB DRC rule programming in the RAVEL language. Topics concerning the RAVEL engine and compiler as well as RAVEL flows and integration are also appropriate.
Moderator: Bjoern Lindberg
511Re: Ravel IDE
By: ztzg
05 Mar 2014 05:48 AM
General Topics
Forum NameTopicsRepliesLast Post
    AnnouncementsNews, FAQs, and related info about how to best use the community.
Moderators: Community Operations
1620Re: Is there a Concept HDL for ...
By: Andrew Beckett
27 May 2014 12:07 AM
    Cadence Academic NetworkFOR ACADEMIC INSTITUTIONS: Share your approaches in design and the use of Cadence tools with fellow students and faculty.
Moderator: Patrick Haspel
126301Re: Learning ORCAD Capture, PS ...
By: steve
27 Jun 2014 04:37 AM
    Feedback, Suggestions, and QuestionsProvide feedback on the forums or any other part of the site. Questions and suggestions welcome.
Moderator: Community Operations
207517Re: Unable to find the AD539 m ...
By: Mohammad Taha
10 Jul 2014 03:16 AM
    JobsPost jobs announcements related primarily, but not exclusively, to jobs utilizing Cadence design tools.5357Great Opportunities in EDA, AR ...
By: epeefencer
11 Feb 2014 06:38 PM

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