While many universities offer classes in VLSI design, it is very difficult for universities to turn out graduates who can go right to work as chip designers. As a result, there’s a looming shortage of engineers in key areas such as RF, mixed-signal and verification. How can this gap between academia and industry be bridged?
An academic network set up by Cadence in Europe in 2007 demonstrates one way of helping universities prepare students for the real world. Further perspectives came from a recent panel discussion at CDN Live! India, entitled “What does it really take for students to be industry ready?”
Cadence Academic Network
The Cadence Academic Network was the idea of Patrick Haspel, who was a lecturer at the University of Mannheim (Germany) in VLSI design and computer architectures prior to joining Cadence in 2005. Patrick noticed that it’s very difficult for universities to stay on the leading edge of chip design technology. He initially joined Cadence as a technical advisor to the sales team for Infineon, but having come up with the idea for a network, he was asked to implement it – and since then, managing it has become a full-time activity.
Patrick told me that the network today includes about 30 actively participating universities, located all across Europe including Russia. Recently, he said, there’s been some interest in expanding the network to India. Some European universities have been identified as “lead” universities in particular areas. For example, the University of Heidelberg is the lead university for high-level verification, the Technical University of Ilmenau focuses on RF design, and the Albert Ludwigs University of Freiburg concentrates on mixed-signal design.
Why is there a need for the network? “If you talk to any semiconductor or systems company, they will tell you they need to train new hires for 6 to 18 months before they are really productive in a project,” Patrick said. “Very few universities do a good enough education so that a new graduate can immediately start working productively in a project.”
The goal of the network, Patrick said, is “to lower the barrier for universities to stay on the leading edge of any microelectronic topic.” The network provides far more than just access to Cadence or partner tools. It also provides methodology help, and to this end, Patrick makes extensive use of Cadence methodology kits. Patrick becomes, in a sense, an “account manager” for the member universities, and just like an account manager for a customer, he helps universities solve problems, manage projects, and gain access to leading-edge tools, libraries and IP.
The Cadence Academic Network is behind the academic track at the CDN Live! EMEA conference. This track, launched in 2008, gives universities a chance to present their work to both academic peers and industry attendees. CDN Live! EMEA is set for May 4-6, 2010, in Munich, Germany.
“Industry Ready” Panel Discussion
A detailed report of the CDN Live! India panel discussion appeared in a recent blog posting by technology journalist Pradeep Chakraborty. Panelists cited various ways for students to be “industry ready” in IC design, including the following points:
Come into the industry with an attitude of collaboration
- Develop deep technical skills for jobs that are “an inch wide and a mile deep”
- Be up to date on current challenges, like low power design and high-speed serial interfaces
- Be prepared to interact with multi-cultural teams, and learn to communicate well
- Look for apprenticeship opportunities for on-the-job training
Patrick’s take is that producing “industry ready” graduates requires a new approach to education in which conditions are similar to what students will encounter in the industry. Instead of the classical “lecture and lab” setup, students should have real projects with milestones, team leaders, and project meetings. I think this is an interesting idea. A tapeout that’s due before the final exam will convey a sense of urgency for which graduates need to be well prepared.