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User Interview: Verification And Integration Of Analog IP
Cambridge Analog Technologies is a provider of high-performance, high-precision, ultra low-power analog IP that is sold to designers of mixed-signal SoCs. It is challenging to design and verify this kind of IP in the first place, and the company faces the additional challenge of making it easy for its...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, Jul 14 2010
Users, Partners Outline Mixed-Signal Silicon Realization Challenges
A lunch panel at the recent Design Automation Conference provided an inside look at Silicon Realization challenges from a foundry, IP provider, EDA supplier, and EDA user perspective. The panel, moderated by Cadence CMO John Bruggeman, focused heavily on mixed-signal design issues and power management...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Mon, Jun 21 2010
ARM And Cadence Get To The “Core” Of Mixed-Signal Design
An increasing number of analog and mixed-signal designs in automotive, power management, wireless, medical, and industrial applications require digital control. But designing a state machine, and integrating the increasing amount of logic gates that implements it, has been challenging for analog designers...
Posted to
Custom IC Design
(Weblog)
by
nizic
on Tue, Jun 8 2010
Mixed Signal: Why The Sudden Attention?
With DAC 2010 rapidly approaching, we can again expect that lots of EDA and IP vendors will use “mixed signal” somewhere in their company’s messaging. Last year it seemed that nearly everyone wanted to jump on the mixed signal “bandwagon” … so what caused this sudden jump in interest in mixed signal...
Posted to
Digital Implementation
(Weblog)
by
PeteMc
on Mon, May 24 2010
Analog Behavioral Modeling - What Language Do You Speak?
An increasing number of mixed-signal design teams are contemplating adding analog behavioral modeling to their repertoire in order to achieve reasonable simulation speeds. Utilizing analog behavioral models can yield simulation performance improvements that can make full chip verification a reality....
Posted to
Custom IC Design
(Weblog)
by
MS Guy
on Tue, Mar 2 2010
DVCon: Showcasing The Cadence Passion For Verification Excellence
Yeah, I know I'm a marketing guy but I really like this stuff! For sure, we are going tech-deep in our tutorials and papers, but we are also setting vision and direction for verification in our keynote presentation. For all of the details, visit our DVCon events page . Highlighted below are two of...
Posted to
Functional Verification
(Weblog)
by
Adam Sherilog
on Mon, Feb 22 2010
Running Low on Power or Receiving Mixed Signals? Talk to the Expert Users
Everytime my wife and I are looking to buy a big item, we do our research by reading blogs, articles, and customer reviews. I have to tell you, the single best source for information is through customer reviews and testimonials by actual users. Testimonials not only included the good stuff, but they...
Posted to
Digital Implementation
(Weblog)
by
soheilm1
on Tue, Oct 6 2009
DesignCon 2010 Call for Papers
Hello, As a member of the technical committee and as the chair member for the Analog and Mixed-Signal Design and Verification track, I would like to invite you to submit an abstract to this conference. We solicit papers for two types of sessions: technical papers and tutorials. Technical papers, which...
Posted to
Custom IC Design
(Weblog)
by
helenet
on Mon, Jul 20 2009
Encounter Digital Implementation System 8.1 San Jose Live Blog
I'll be live blogging from the Cadence Campus in San Jose today. We're doing a seminar that focuses on the 8.1 release of the Encounter Digital Implementation System , and we'll be focusing on the following areas: Design Closure Mixed Signal Low Power Advanced Node Analysis & Signoff...
Posted to
Digital Implementation
(Weblog)
by
BobD
on Tue, Apr 7 2009
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