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low power

  • "What is ChipEstimate?" plus a touch of RC-Physical x 2

    Day 2 @ CDNLive San Jose: Another interesting day - met quite a few people, some new, others I met the day before while co-presenting at two morning sessions, and also some of my fav customers. My focus-of-the-day - ChipEstimate awareness with a touch of RC-P. Here are some attendees' feedback: Question...
    Posted to Logic Design (Weblog) by Kenneth Chang on Thu, Sep 11 2008
  • CDNLive SJ - system design and verification - don't miss it

    If you are a system validation/verification engineer, an architect, a power engineer or an embedded SW engineer, you should stop-by and visit us at CDNLive . See below some specific information on what you will be able to see in this domain: Hope to see you there. - Ran Day 1 - Monday - was very exciting...
    Posted to System Design and Verification (Weblog) by Ran Avinun on Tue, Sep 9 2008
  • Logic Design at CDNLive! Silicon Valley -- see you Sept. 8!

    We've been working hard to put together another CDNLive! event, coming up September 8-11 in San Jose. There is a whole track dedicated to Logic Design. Some of the events I'll be working at are: Sept 8. at 8am: Techtorial " Achieve Project Success Through Early Low-Power Planning and Validation"...
    Posted to Logic Design (Weblog) by Jack Erickson on Wed, Aug 27 2008
  • Some tips for predicting power consumption

    In my previous post , entitled “How do you predict power?”, I was actually looking for reader input via the comments. I should have been more clear on that….perhaps I am too accustomed to my 6-year-old son, who will supply a barrage of responses to even a rhetorical question. Anyway...
    Posted to Logic Design (Weblog) by Jack Erickson on Mon, Aug 11 2008
  • How do you predict power?

    You read stories about it – the device or chip that comes out and consumes more power than expected. Maybe the battery life isn’t what it was supposed to be (my current smartphone is a great example!). Or even worse, maybe there are failures because the excessive power density generates too...
    Posted to Logic Design (Weblog) by Jack Erickson on Mon, Jul 28 2008
  • High on Low Power

    Low power design has been a ubiquitous topic in the electronics industry the past couple years. The term "holistic" is often used (or over-used) to describe how you should approach low power design. I think the best illustration of how to approach low power design the right way to meet a customer's...
    Posted to Logic Design (Weblog) by Jack Erickson on Sat, Jul 12 2008
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