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Functional Verification

  • Using TLM Verification To Reduce RTL Verification

    SystemC is the most common language used for modeling transaction level (TLM) behavior of hardware. From the beginning of TLM users have been exploring how to perform functional verification at the fast TLM level, and hopefully reduce functional verification at the RTL level. The timing might have been...
    Posted to System Design and Verification (Weblog) by Steve Brown on Wed, Feb 25 2009
  • New OVM-e Testflow Features Introduce Increased Automation

    Hi All, With the release of the OVM- e library, there are now many new features available for users to take full advantage of. I would like to discuss one new feature that, when introduced into a users environment, allows for much greater automation and control over a given simulation run. The e language...
    Posted to Functional Verification (Weblog) by teamspecman on Wed, Feb 25 2009
  • DVCon '09 Preview

    For those of you that will not be able to make it in person: So you can follow the action at home, when not on duty in the Cadence booth I'll be snapping pictures for a daily DVCon photo blog along the lines of what I did for CDNLive San Jose last September. (Recall my reports from CDNLive days 0...
    Posted to Functional Verification (Weblog) by jvh3 on Fri, Feb 20 2009
  • Tech Tip: Viewing The Combined Help for IES-XL

    IES-XL is comprised of IUS, Incisive Verification Kits with Methodology, Specman, and Enterprise Manager in Desktop Mode. One of very common query from Incisive Simulator users is the need to view the help of all the IES-XL components together, in a same help browser. The good news is that it is very...
    Posted to Functional Verification (Weblog) by adua on Fri, Feb 20 2009
  • Grey-Boxed Data-Path Approach Using 'when sub-typing'

    [Please join Team Specman in welcoming the first guest blogger from our user base: Ms. Kaberi Banerjee, a senior design & verification engineer based in Silicon Valley California] Fellow Specmaniacs (or should I say "specmites" – in alignment with the subject of bugs!), I recently...
    Posted to Functional Verification (Weblog) by teamspecman on Wed, Feb 18 2009
  • Adaptive Chips Selects OVM Over VMM -- An Interview With Amjad Qureshi

    On February 11 Cadence announced that Adaptive Chips had adopted the Incisive verification solution using the OVM to improve its verification process. I had the opportunity to "virtually" sit down with Amjad Qureshi, Vice President of Technology at Adaptive Chips, to ask him a few questions...
    Posted to Functional Verification (Weblog) by Adam Sherilog on Wed, Feb 18 2009
  • Post-Show Thoughts on DesignCon 2009

    Joe Hupcey posted some photos from the DesignCon show in Santa Clara last week, and I'm finally finding a few minutes to comment on the event. I have a soft spot in my heart for this conference; I think that I've presented something in some form at every show but one since it was called Design...
    Posted to Functional Verification (Weblog) by tomacadence on Thu, Feb 12 2009
  • Road Trip!

    As at most companies these days, Cadence is doing what it can to minimize travel expenses wherever possible. Consequently, whereas my business trips used to always involve an airplane in some way, these days myself and my colleagues fan out by car from our repective offices to visit customers. Hence...
    Posted to Functional Verification (Weblog) by jvh3 on Thu, Feb 12 2009
  • Of EDA Vendors and Conferences

    There's an interesting thread on Cool Verification ( http://www.coolverification.com/2009/02/dvcon-misfits-unite.html ) about the number of papers at DVCon 2009 authored or co-authored by EDA vendors. There seems to be an assumption on the part of some posters that vendor involvement implies marketing...
    Posted to Functional Verification (Weblog) by tomacadence on Thu, Feb 5 2009
  • Report From DesignCon 2009

    This week the " DesignCon " show is in town (<= 10 minutes from the Cadence campus at the Santa Clara convention center), so I couldn't resist the opportunity to check out some of the speeches and exhibits. I'm happy to report that my curiosity was rewarded -- here are my notes along...
    Posted to Functional Verification (Weblog) by jvh3 on Tue, Feb 3 2009
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