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  • Getting IP, Tools, And People “Ready For SOI”

    Last month the SOI Industry Consortium announced a "Ready for SOI Technology" program with initial offerings of silicon-on-insulator IP from ARM, IBM and Cadence. Since interest in SOI appears to be growing for advanced process nodes, I thought it would be a good time to look at what "ready...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Apr 7 2010
  • ARM Keynote: Will ‘Dark Silicon’ Derail The Mobile Internet?

    Dark Silicon sounds like it should be the title of a best-selling thriller novel, and in a way, it is a thriller when it comes to the future of semiconductors. Will advanced nodes produce a huge mass of transistors that will go "dark" because we can't afford to power them? Will all our...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Mar 31 2010
  • ARM AMBA 4 Protocol And VIP – A Closer Look

    ARM last week announced the first phase of its AMBA 4 specification, and Cadence simultaneously released Incisive verification IP (VIP) for the e language and SystemVerilog. So why is ARM releasing AMBA 4, what's in the two phases, and what's in the VIP? To get a closer look at what's in...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Mar 17 2010
  • VIP Portfolio Extension: New AMBA 4 Protocol Support

    ARM-loving Specmaniacs's rejoice: we are now at liberty to announce that we are providing Verification IP (VIP) support for the new AMBA 4 protocol simultaneously with ARM’s introduction of said protocol. Here is the official announcement, which includes AMBA4 and VIP highlights . What this...
    Posted to Functional Verification (Weblog) by teamspecman on Mon, Mar 8 2010
  • Moving Past The Missing Model Syndrome

    One of the issues that has hindered the progress of using Virtual Platforms for early software development is missing models. I recall seeing Axys Design's Maxsim tool back around 2001 and thinking how cool it was. All the user had to do was drag and drop models and wire them together to create a...
    Posted to System Design and Verification (Weblog) by jasona on Thu, Feb 18 2010
  • What Can We Learn From The iPad About Chip Design?

    You probably heard that Apple announced a touchscreen tablet computer last week. The announcement came with a lot of talk of it defining a new product category. That's somewhat laughable, since tablet computers have been around for a few years. BUT - the previous tablet computers were all based on...
    Posted to Logic Design (Weblog) by Jack Erickson on Tue, Feb 2 2010
  • CES Provides Wake-Up Call for EDA

    Since consumer electronics is the primary driver for IC and systems design, what happens at the Consumer Electronics Show (CES) should interest the EDA community. Any trends in new consumer devices will point the way to design challenges EDA tools will have to solve. From looking at blogs and media coverage...
    Posted to Industry Insights (Weblog) by rgoering on Mon, Jan 11 2010
  • ARM Techcon3 Virtual Classroom

    For those that read my September post about ARM Techcon3 in Santa Clara but couldn't make it, the Virtual Classroom is now open. All of the recorded presentations are available. You need to register, but the process was painless and I was watching presentations within a few minutes of registering...
    Posted to System Design and Verification (Weblog) by jasona on Fri, Dec 4 2009
  • Panelists: 32 nm HKMG Is Ready To Roll

    The 32/28 nm Common Platform high-k metal gate (HKMG) technology is “ready and open for business,” according to the title of a breakfast panel at the ARM Techcon3 conference Oct. 22. Panelists from IBM , ARM and Cadence talked about the benefits of HKMG, the requirements it places on the...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Oct 28 2009
  • Virtualization and Simulation Roundtable

    A couple of weeks ago I participated in a roundtable discussion led by Peggy Aycinena that has been summarized and posted on . Please have a look if you are interested in Virtual Platform usage for embedded software. One of the things that became clear right away is there are way too many...
    Posted to System Design and Verification (Weblog) by jasona on Tue, Oct 13 2009
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